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精密運算放大器 (Vos < 1mV)

OPA4202

現行

低雜訊 (0.2µVPP、9nV/√Hz)、高電容驅動 (25nF)、四路 super beta 精密運算放大器

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產品規格表

OPA4202

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Vos (offset voltage at 25°C) (max) (mV) 0.2 Offset drift (typ) (µV/°C) 0.5 Input bias current (max) (pA) 2000 GBW (typ) (MHz) 1 Features Cost Optimized, High Cload Drive, Super Beta Slew rate (typ) (V/µs) 0.35 Rail-to-rail No Iq per channel (typ) (mA) 0.58 Vn at 1 kHz (typ) (nV√Hz) 9 CMRR (typ) (dB) 148 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.035 Architecture Bipolar Input common mode headroom (to negative supply) (typ) (V) 1.5 Input common mode headroom (to positive supply) (typ) (V) -1.5 Output swing headroom (to negative supply) (typ) (V) 0.65 Output swing headroom (to positive supply) (typ) (V) 0.65 THD + N at 1 kHz (typ) (%) 0.0002
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Vos (offset voltage at 25°C) (max) (mV) 0.2 Offset drift (typ) (µV/°C) 0.5 Input bias current (max) (pA) 2000 GBW (typ) (MHz) 1 Features Cost Optimized, High Cload Drive, Super Beta Slew rate (typ) (V/µs) 0.35 Rail-to-rail No Iq per channel (typ) (mA) 0.58 Vn at 1 kHz (typ) (nV√Hz) 9 CMRR (typ) (dB) 148 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.035 Architecture Bipolar Input common mode headroom (to negative supply) (typ) (V) 1.5 Input common mode headroom (to positive supply) (typ) (V) -1.5 Output swing headroom (to negative supply) (typ) (V) 0.65 Output swing headroom (to positive supply) (typ) (V) 0.65 THD + N at 1 kHz (typ) (%) 0.0002
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Precision super-beta performance:
    • Low offset voltage: 200 µV (maximum)
    • Ultra-low drift: 1 µV/°C (maximum)
  • Excellent efficiency:
    • Quiescent current: 580 µA (typical)
    • Gain-bandwidth product: 1 MHz
    • Low input voltage noise: 9 nV/√Hz
  • Ease of use, design simplicity:
    • Heavy capacitive load drive: 5-µs settling time with 25 nF
    • Ultra-high input impedance: 3000 GΩ and
      0.5 pF
    • EMI hardened, thermal, and short-circuit protection
  • Stable Performance:
    • High CMRR and AOL: 126 dB (minimum)
    • High PSRR: 126 dB (minimum)
  • Low bias current: 2 nA (maximum)
  • Low 0.1-Hz to 10-Hz noise: 0.2 µVPP
  • Wide supply voltage: ±2.25 V to ±18 V
  • Replaces OP-07 and OP-27
  • Precision super-beta performance:
    • Low offset voltage: 200 µV (maximum)
    • Ultra-low drift: 1 µV/°C (maximum)
  • Excellent efficiency:
    • Quiescent current: 580 µA (typical)
    • Gain-bandwidth product: 1 MHz
    • Low input voltage noise: 9 nV/√Hz
  • Ease of use, design simplicity:
    • Heavy capacitive load drive: 5-µs settling time with 25 nF
    • Ultra-high input impedance: 3000 GΩ and
      0.5 pF
    • EMI hardened, thermal, and short-circuit protection
  • Stable Performance:
    • High CMRR and AOL: 126 dB (minimum)
    • High PSRR: 126 dB (minimum)
  • Low bias current: 2 nA (maximum)
  • Low 0.1-Hz to 10-Hz noise: 0.2 µVPP
  • Wide supply voltage: ±2.25 V to ±18 V
  • Replaces OP-07 and OP-27

The OPA202, OPA2202, and OPA4202 (OPAx202) are a family of devices built on TI’s industry-leading precision super-beta, complementary, bipolar semiconductor process. This process offers ultra-low flicker noise, low offset voltage, low offset voltage temperature drift, and excellent linearity with common-mode and power-supply variation. These devices offer an exceptional combination of dc precision, heavy capacitive load drive, and protection against external EMI, thermal, and short-circuit events.

The supply current is 580 µA at ±18 V. The OPAx202 do not exhibit phase inversion, and the series is stable with high capacitive loads. The OPAx202 are fully specified with a temperature range from –40°C to +105°C.

The OPA202, OPA2202, and OPA4202 (OPAx202) are a family of devices built on TI’s industry-leading precision super-beta, complementary, bipolar semiconductor process. This process offers ultra-low flicker noise, low offset voltage, low offset voltage temperature drift, and excellent linearity with common-mode and power-supply variation. These devices offer an exceptional combination of dc precision, heavy capacitive load drive, and protection against external EMI, thermal, and short-circuit events.

The supply current is 580 µA at ±18 V. The OPAx202 do not exhibit phase inversion, and the series is stable with high capacitive loads. The OPAx202 are fully specified with a temperature range from –40°C to +105°C.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 OPAx202 Precision, Low-Noise, Heavy Capacitive Drive, 36-V Operational Amplifiers datasheet (Rev. H) PDF | HTML 2020/5/20
應用說明 Optimizing Noise and Power with Super Beta-Fully Differential Amplifiers PDF | HTML 2020/12/7

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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模擬型號

OPAx202 PSpice Model (Rev. D)

SBOMAH6D.ZIP (30 KB) - PSpice 模型
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模擬型號

OPAx202 TINA-TI Reference Design (Rev. C)

SBOMAH5C (346 KB) - TINA-TI 參考設計
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模擬型號

OPAx202 TINA-TI SPICE Model (Rev. C)

SBOMAH4C.ZIP (10 KB) - TINA-TI Spice 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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計算工具

OPAMP-NOISECALC — Noise Calculator

This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:

  • A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
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