OPA625

現行

具功率調整功能的高頻寬、高精度、低雜訊和失真放大器 SAR ADC 驅動器

產品詳細資料

Architecture Voltage FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 GBW (typ) (MHz) 120 BW at Acl (MHz) 80 Acl, min spec gain (V/V) 1.1 Slew rate (typ) (V/µs) 115 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 3.2 Iq per channel (typ) (mA) 2 Vos (offset voltage at 25°C) (max) (mV) 0.1 Rail-to-rail In to V-, Out Features Adjustable BW/IQ/IOUT, C-Load Drive, Shutdown Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 115 Input bias current (max) (pA) 4000000 Offset drift (typ) (µV/°C) 0.5 Iout (typ) (mA) 100 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 Frequency of harmonic distortion measurement (MHz) 1
Architecture Voltage FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 GBW (typ) (MHz) 120 BW at Acl (MHz) 80 Acl, min spec gain (V/V) 1.1 Slew rate (typ) (V/µs) 115 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 3.2 Iq per channel (typ) (mA) 2 Vos (offset voltage at 25°C) (max) (mV) 0.1 Rail-to-rail In to V-, Out Features Adjustable BW/IQ/IOUT, C-Load Drive, Shutdown Rating Catalog Operating temperature range (°C) -40 to 125 CMRR (typ) (dB) 115 Input bias current (max) (pA) 4000000 Offset drift (typ) (µV/°C) 0.5 Iout (typ) (mA) 100 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 Frequency of harmonic distortion measurement (MHz) 1
SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm)
  • High-Drive Mode:
    • GBW (G = 100): 120 MHz
    • Slew Rate: 115 V/µs
    • 16-Bit Settling at 4-V Step: 280 ns
    • Low Voltage Noise: 2.5 nV/√Hz at 10 kHz
    • Low Output Impedance: 1 Ω at 1 MHz
    • Offset Voltage: ±100 µV (max)
    • Offset Voltage Drift: ±3 µV/ºC (max)
    • LowQuiescent Current: 2 mA (typ)
  • Low-Power Mode:
    • GBW: 1 MHz
    • Low Quiescent Current: 270 µA (typ)
  • Power-Scalable Features:
    • Ultrafast Transition from Low-Power to High-Drive Mode: 170 ns
  • High AC and DC Precision:
    • Low Distortion: –122 dBc for HD2 and –140 dBc for HD3 at 100 kHz
    • Input Common-Mode Range Includes Negative Rail
    • Rail-to-Rail Output
    • Wide Temperature Range: Fully Specified from –40°C to +125°C
  • High-Drive Mode:
    • GBW (G = 100): 120 MHz
    • Slew Rate: 115 V/µs
    • 16-Bit Settling at 4-V Step: 280 ns
    • Low Voltage Noise: 2.5 nV/√Hz at 10 kHz
    • Low Output Impedance: 1 Ω at 1 MHz
    • Offset Voltage: ±100 µV (max)
    • Offset Voltage Drift: ±3 µV/ºC (max)
    • LowQuiescent Current: 2 mA (typ)
  • Low-Power Mode:
    • GBW: 1 MHz
    • Low Quiescent Current: 270 µA (typ)
  • Power-Scalable Features:
    • Ultrafast Transition from Low-Power to High-Drive Mode: 170 ns
  • High AC and DC Precision:
    • Low Distortion: –122 dBc for HD2 and –140 dBc for HD3 at 100 kHz
    • Input Common-Mode Range Includes Negative Rail
    • Rail-to-Rail Output
    • Wide Temperature Range: Fully Specified from –40°C to +125°C

The OPAx625 family of operational amplifiers are excellent 16-bit and 18-bit, SAR ADC drivers that are high precision with low THD and noise allow for a unique power-scalable solution. This family of devices is fully characterized and specified with a 16-bit settling time of 280 ns that enables a true 16-bit effective number of bits (ENOB). Along with a high dc precision of only 100 µV offset voltage, a wide gain-bandwidth product of 120 MHz, a low wideband noise of 2.5 nV/√Hz, this family is optimized for driving high-throughput, high-resolution SAR ADCs, such as the ADS88xx family of SAR ADCs.

The OPAx625 features two operating modes: high-drive and low-power. In the innovative low-power mode, the OPAx625 tracks the input signal allowing the OPAx625 to transition from low-power mode to high-drive mode at 16-bit ENOB within 170 ns.

The OPAx625 family is available in 6-pin SOT and 10-pin VSSOP packages and is specified for operation from –40°C to +125°C.

The OPAx625 family of operational amplifiers are excellent 16-bit and 18-bit, SAR ADC drivers that are high precision with low THD and noise allow for a unique power-scalable solution. This family of devices is fully characterized and specified with a 16-bit settling time of 280 ns that enables a true 16-bit effective number of bits (ENOB). Along with a high dc precision of only 100 µV offset voltage, a wide gain-bandwidth product of 120 MHz, a low wideband noise of 2.5 nV/√Hz, this family is optimized for driving high-throughput, high-resolution SAR ADCs, such as the ADS88xx family of SAR ADCs.

The OPAx625 features two operating modes: high-drive and low-power. In the innovative low-power mode, the OPAx625 tracks the input signal allowing the OPAx625 to transition from low-power mode to high-drive mode at 16-bit ENOB within 170 ns.

The OPAx625 family is available in 6-pin SOT and 10-pin VSSOP packages and is specified for operation from –40°C to +125°C.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 OPAx625 High-Bandwidth, High-Precision, Low THD+N, 16-Bit and 18-Bit Analog-to-Digital Converter (ADC) Drivers datasheet (Rev. A) PDF | HTML 2015/4/20
Application brief Dual Bipolar Power-Supply Considerations for Amplifiers 2017/8/1
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
電子書 Analog Engineer’s Pocket Reference Guide Fifth Edition (Rev. D) PDF | HTML 2014/9/30

設計與開發

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開發板

ADS9120EVM-PDK — ADS9120 16 位元 2.5 MSPS、15.5mW SAR ADC EVM 性能展示套件 (PDK)

ADS9120 評估模組 (EVM) 性能展示套件 (PDK) 是用於評估 ADS9120 連續近似暫存器類比轉數位轉換器 (SAR ADC) 效能的平台。ADS9120EVM-PDK 包含 ADS9120 EVM 板、PHI 控制器電路板,以及隨附的電腦軟體,可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。

使用指南: PDF
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模擬型號

OPA625 PSpice Model (Rev. B)

SBOM937B.ZIP (161 KB) - PSpice 模型
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模擬型號

OPA625 TINA-TI Reference Design (Rev. A)

SBOM936A.TSC (340 KB) - TINA-TI 參考設計
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模擬型號

OPA625 TINA-TI Spice Model (Rev. A)

SBOM935A.ZIP (10 KB) - TINA-TI Spice 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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許多 TI 參考設計包含 OPA625

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 6 Ultra Librarian

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