SN54LS174

Name: SN54LS174
Brand: TI
SKU: SN54LS174
Price: 14.171 USD

現行

具有清除功能的六路 D 型正反器

立即訂購

產品規格表

document-pdfAcrobat Hex/Quadruple D-Type Flip-Flops With Clear datasheet (Rev. A) (英文)

SN54LS174

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

6

Technology family

LS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

Push-Pull

Clock frequency (max) (MHz)

35

IOL (max) (mA)

8

IOH (max) (mA)

-0.4

Supply current (max) (µA)

26000

Features

High speed (tpd 10-50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

Number of channels

6

Technology family

LS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

Push-Pull

Clock frequency (max) (MHz)

35

IOL (max) (mA)

8

IOH (max) (mA)

-0.4

Supply current (max) (µA)

26000

Features

High speed (tpd 10-50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

CDIP (J)

16

135.3552 mm² 19.56 x 6.92

CFP (W)

16

69.319 mm² 10.3 x 6.73

LCCC (FK)

20

79.0321 mm² 8.89 x 8.89

'174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs
'175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs
Three Performance Ranges Offered: See Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications include:

Buffer/Storage Registers
Shift Registers
Pattern Generators

'174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs
'175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs
Three Performance Ranges Offered: See Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications include:

Buffer/Storage Registers
Shift Registers
Pattern Generators

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

filter

尋找其它 D 型正反器

下載