SN65LBC173A-EP
- Designed for TIA/EIA-485, TIA/EIA-422 and ISO 8482 Applications
- Signaling Rates(1) up to 50 Mbps.
- Fail-Safe in Bus Short-Circuit, Open-Circuit, and Idle-Bus Conditions
- ESD Protection on Bus Inputs Exceeds 6 kV
- Common-Mode Bus Input Range –7 V to 12 V
- Propagation Delay Times < 18 ns
- Low-Standby Power Consumption < 32 µA
- Pin-Compatible Upgrade for AM26LS32, DS96F173, LTC488, and SN75173
The SN65LBC173A is a quadruple differential line receiver with tri-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications.
This device is optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
The receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOS®, facilitating low-power consumption and robustness.
The G and G inputs provide enable control logic for either positive- or negative-logic enabling all four drivers. When disabled or powered off, the receiver inputs present a high-impedance to the bus for reduced system loading.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN65LBC173A-EP Quadruple RS-485 Differential Line Receiver datasheet | PDF | HTML | 2016年 11月 28日 |
* | VID | SN65LBC173A-EP VID V6213623 | 2018年 3月 27日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
訂購與品質
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