SN74AVCB164245-Q1
- Qualified for Automotive Applications
- Member of the Texas Instruments Widebus™ Family
- DOC™ Circuitry Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without Speed Degradation - Dynamic Drive Capability Is Equivalent to Standard Outputs
With IOH and IOL of ±24 mA at 2.5-V VCC - Control Inputs VIH/VIL Levels Are
Referenced to VCCB Voltage - If Either VCC Input Is at GND, Both Ports
Are in the High-Impedance State - Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode
Data Communications - Ioff Supports Partial-Power-Down Mode Operation
- Fully Configurable Dual-Rail Design Allows Each Port to Operate
Over Full 1.4-V to 3.6-V Power-Supply Range - Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 750-V Charged-Device Model (C101)
Widebus is a trademark of Texas Instruments.
DOC is a trademark of Texas Instruments
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.
The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, both ports are in the high-impedance state.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74AVCB164245-Q1 16-Bit Dual-Supply Bus Transceiver datasheet (Rev. A) | 2010/5/26 | |||
| 應用說明 | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/2 | |||
| 應用說明 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/7/12 | |||
| 應用說明 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/7/3 | |||
| 選擇指南 | Voltage Translation Buying Guide (Rev. A) | 2021/4/15 | ||||
| 更多文件說明 | Automotive Logic Devices Brochure | 2014/8/27 |
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