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邏輯和電壓轉換
電壓轉換器及電平移位器
方向控制電壓轉換器

SN74AVCH1T45

現行

具有可配置電壓轉換和 3 態輸出的單一位元雙電源供電匯流排收發器

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SN74AXCH1T45 現行 單位元雙電源匯流排收發器 Pin-to-pin upgrade with a wider voltage range and improved performance

SN74AVCH1T45

現行
產品規格表 立即訂購

產品詳細資料

Technology family AVC Applications GPIO Bits (#) 1 High input voltage (min) (V) 1 High input voltage (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Data rate (max) (Mbps) 500 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 20 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff) Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AVC Applications GPIO Bits (#) 1 High input voltage (min) (V) 1 High input voltage (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Data rate (max) (Mbps) 500 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 20 Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff) Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 6 2.1875 mm² 1.75 x 1.25 SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1
  • Available in Texas Instruments’ NanoStar™ integrated circuit package
  • Available in Texas Instruments’ NanoFree™ package
  • Control inputs (DIR) VIH and VIL levels are referenced to VCCA voltage
  • Bus hold on data inputs eliminates the need for external pullup and pulldown resistors
  • VCC isolation
  • Fully configurable dual-rail design
  • I/Os are 4.6V tolerant
  • Ioff supports partial-power-down mode operation
  • Typical max data rates
    • 500Mbps (1.8V to 3.3V translation)
    • 320Mbps (<1.8V to 3.3V translation)
    • 320Mbps (translate to 2.5V or 1.8V)
    • 280Mbps (translate to 1.5V)
    • 240Mbps (translate to 1.2V)
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • Human-Body Model (A114-A): 2000V
    • Machine Model (A115-A): 200V
    • Charged-Device Model (C101): 1000V
  • Available in Texas Instruments’ NanoStar™ integrated circuit package
  • Available in Texas Instruments’ NanoFree™ package
  • Control inputs (DIR) VIH and VIL levels are referenced to VCCA voltage
  • Bus hold on data inputs eliminates the need for external pullup and pulldown resistors
  • VCC isolation
  • Fully configurable dual-rail design
  • I/Os are 4.6V tolerant
  • Ioff supports partial-power-down mode operation
  • Typical max data rates
    • 500Mbps (1.8V to 3.3V translation)
    • 320Mbps (<1.8V to 3.3V translation)
    • 320Mbps (translate to 2.5V or 1.8V)
    • 280Mbps (translate to 1.5V)
    • 240Mbps (translate to 1.2V)
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • Human-Body Model (A114-A): 2000V
    • Machine Model (A115-A): 200V
    • Charged-Device Model (C101): 1000V

The SN74AVCH1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB, which accepts any supply voltage from 1.2V to 3.6V. This feature allows for universal low-voltage, bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVCH1T45 is designed for asynchronous communication between two data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input.

The SN74AVCH1T45 is designed so that the DIR input is referenced to VCCA.

The SN74AVCH1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB, which accepts any supply voltage from 1.2V to 3.6V. This feature allows for universal low-voltage, bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVCH1T45 is designed for asynchronous communication between two data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input.

The SN74AVCH1T45 is designed so that the DIR input is referenced to VCCA.
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類型 標題 日期
* Data sheet SN74AVCH1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs datasheet (Rev. F) PDF | HTML 2024年 4月 11日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 2015年 4月 30日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note Selecting the Right Level Translation Solution (Rev. A) 2004年 6月 22日
More literature LCD Module Interface Application Clip 2003年 5月 9日
User guide AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) 2002年 8月 20日
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002年 6月 13日
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002年 5月 22日
Application note Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) 1999年 7月 7日
Application note AVC Logic Family Technology and Applications (Rev. A) 1998年 8月 26日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
TI.com 無法提供
開發板

AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

使用指南: PDF
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模擬型號

SN74AVCH1T45 IBIS Model (Rev. A)

SCEM438A.ZIP (118 KB) - IBIS Model
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參考設計

TIDA-00352 — SDI 視訊聚合參考設計

This verified reference design is a complete four channel SDI aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous HD-SDI sources together into one 5.94 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is (...)
Test report: PDF
電路圖: PDF
參考設計

TIDA-00309 — DisplayPort 視訊 4:1 聚合參考設計

This verified reference design is a complete four channel DisplayPort aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous DisplayPort (DP) sources together into one 10.8 Gbps serial link. The serial data is transferred via copper or optical fiber where a (...)
Test report: PDF
電路圖: PDF
封裝 引腳 下載
DSBGA (YZP) 6 檢視選項
SOT-23 (DBV) 6 檢視選項
SOT-SC70 (DCK) 6 檢視選項
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