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邏輯元件和電壓轉換
電壓轉換器及電平移位器
電壓轉換器

SN74AXC4T245

現行

4 位元雙電源匯流排收發器

立即訂購
產品規格表

SN74AXC4T245

現行
產品規格表 立即訂購

產品詳細資料

Bits (#) 4 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 0.65 Vin (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Applications JTAG, SPI, UART Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4 Technology family AXC Supply current (max) (mA) 0.04 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 4 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 0.65 Vin (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Applications JTAG, SPI, UART Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4 Technology family AXC Supply current (max) (mA) 0.04 Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports Partial-Power-Down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 8000V Human-Body Model
    • 1000V Charged-Device Model
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction control pins to allow simultaneous up and down translation
  • Glitch-free power supply sequencing
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports Partial-Power-Down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 8000V Human-Body Model
    • 1000V Charged-Device Model

The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245 is compatible with a single-supply system.

The SN74AXC4T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the xOE pins to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The design of the VCC isolation feature allows both I/O ports to enter a high-impedance state by disabling their outputs if either VCCA or VCCB is less than 100mV.

Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXC4T245 is a four-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC4T245 is compatible with a single-supply system.

The SN74AXC4T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (1DIR and 2DIR). The output-enable inputs (1 OE and 2 OE) are used to disable the outputs so the buses are effectively isolated. The SN74AXC4T245 device is designed so the control pins (xDIR and x OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the xOE pins to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The design of the VCC isolation feature allows both I/O ports to enter a high-impedance state by disabling their outputs if either VCCA or VCCB is less than 100mV.

Glitch-Free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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類型 標題 日期
* Data sheet SN74AXC4T245 Four-Bit Bus Transceiver with Configurable Voltage Translation and Tri-State Outputs datasheet (Rev. B) PDF | HTML 2024年 4月 11日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Application brief Translate Voltages for UART (Rev. B) PDF | HTML 2021年 8月 4日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note 2N7001T Voltage Level Translator for SPI, UART, JTAG Interface (Rev. A) PDF | HTML 2021年 3月 29日
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021年 3月 29日
Application note Glitch free power sequencing with AXC level translators (Rev. A) 2018年 9月 20日

設計與開發

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開發板

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

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使用指南: PDF | HTML
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14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

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開發板

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通用 EVM 的設計可支援一、二、四、八通道 LVC 及 AVC 方向控制的轉換裝置。此外也支援相同通道數量的匯流排保留與汽車 -Q1 裝置。AVC 是低電壓轉換裝置，具較低驅動強度 12mA。LVC 是較高的電壓轉換裝置，範圍從 1.65 到 5.5V 且具較高驅動強度 32mA。

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模擬型號

SN74AXC4T245 IBIS Model (Rev. A)

SCEM585A.ZIP (35 KB) - IBIS Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 16 Ultra Librarian
UQFN (RSV) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
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