產品詳細資料

Technology family LVC Number of channels 1 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) SOT-5X3 (DRL) 5 2.56 mm² (1.6 mm × 1.6 mm) X2SON (DPW) 5 0.64 mm² (0.8 mm × 0.8 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm) DSBGA (YZP) 5 2.1875 mm² (— mm × — mm)
  • Available in the Ultra Small 0.64-mm2
    Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.7 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Ultra Small 0.64-mm2
    Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.7 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G125 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G125 device is available in a variety of packages including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G125 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G125 device is available in a variety of packages including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

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SN74AUP2G04 現行 2 通道、0.8-V 至 3.6-V 低功耗逆變器 Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA
SN74AUP1G125 現行 具有 3 態輸出的單路 0.8-V 至 3.6-V 低功耗緩衝器 Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA
SN74AUP2G34 現行 2 通道、0.8-V 至 3.6-V 低功耗緩衝器 Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA
SN74AHC1G125 現行 具有 3 態輸出的單路 2-V 至 5.5-V 緩衝器 Voltage range 2V to 5.5V, average propagation delay 12ns, average drive strength 9mA

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LVC1G125 Single Bus Buffer Gate With 3-State Output datasheet (Rev. T) PDF | HTML 2014/10/21
選擇指南 Logic Guide (Rev. AC) PDF | HTML 2025/11/13
Application brief Optimizing Optical Network Terminal Units With Logic PDF | HTML 2023/4/5
Application brief Enabling Optimal Solar Inverter Power Stage Designs with Logic PDF | HTML 2021/8/17
應用說明 Designing and Manufacturing with TI's X2SON Packages 2017/8/23

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模擬型號

HSPICE Model for SN74LVC1G125

SCEJ253.ZIP (87 KB) - HSpice 模型
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SN74LVC1G125 Behavioral SPICE Model

SCEM639.ZIP (7 KB) - PSpice 模型
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SN74LVC1G125 IBIS Model (Rev. B)

SCEM270A (309 KB) - IBIS 模型
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SN74LVC1G125 PSpice Model

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-SC70 (DCK) 5 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
USON (DRY) 6 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
DSBGA (YZP) 5 Ultra Librarian

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