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TLC69699

現行

SPI 與局部調光 TLC696xx LED 驅動器間的橋接器

產品詳細資料

Vin (min) (V) 2.5 Vin (max) (V) 5.5 Features CRC, Fault output, Interrupt pin, Oscillator, UVLO Operating temperature range (°C) -40 to 85 Rating Catalog
Vin (min) (V) 2.5 Vin (max) (V) 5.5 Features CRC, Fault output, Interrupt pin, Oscillator, UVLO Operating temperature range (°C) -40 to 85 Rating Catalog
SOT-23-THN (DYY) 14 13.692 mm² 4.2 x 3.26 WSON (DRR) 12 9 mm² 3 x 3
  • Operating voltage VCC range: 2.5V to 5.5V
  • SPI peripheral
    • Data transfer rate up to 20MHz
    • Support multiple peripherals with one controller
  • Continuous Clock Serial Interface (CCSI) Controller and Peripheral
    • Data transfer rate up to 20MHz
    • Programmable clock jitter for EMI enhancement
  • Diagnostics
    • Open-drain FAULT pin
    • SPI communication loss detection
    • CRC for SPI communication
    • Continuous clock watchdog
    • CCSI data integrity
  • Data ready interrupt for availability of data
  • Operating voltage VCC range: 2.5V to 5.5V
  • SPI peripheral
    • Data transfer rate up to 20MHz
    • Support multiple peripherals with one controller
  • Continuous Clock Serial Interface (CCSI) Controller and Peripheral
    • Data transfer rate up to 20MHz
    • Programmable clock jitter for EMI enhancement
  • Diagnostics
    • Open-drain FAULT pin
    • SPI communication loss detection
    • CRC for SPI communication
    • Continuous clock watchdog
    • CCSI data integrity
  • Data ready interrupt for availability of data

The TLC69699 SPI-compatible connectivity enables TLC696xx device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the TLC696xx device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.

TLC69699 incorporates reporting of faults in both the TLC696xx daisy chain and TLC69699 internal. Data transmission of register and brightness to the TLC696xx daisy chain is CRC protected by TLC69699. In addition, both the data and continuous clock lines are guarded by TLC69699 for stuck-at faults.

The TLC69699 SPI-compatible connectivity enables TLC696xx device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the TLC696xx device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.

TLC69699 incorporates reporting of faults in both the TLC696xx daisy chain and TLC69699 internal. Data transmission of register and brightness to the TLC696xx daisy chain is CRC protected by TLC69699. In addition, both the data and continuous clock lines are guarded by TLC69699 for stuck-at faults.

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* Data sheet TLC69699 SPI-Compatible Connectivity for TLC696xx Device Family datasheet PDF | HTML 2024年 8月 12日

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開發板

TLC69699DYYEVM — TLC69699 評估模組

TLC69699 是 TLC696xx 系列 CCSI 和 SPI 間的連線 IC。TLC69699DYYEVM 用於評估連線 IC TLC69699 的特性、運作及使用狀況。TLC69699DYYEVM 旨在與 TLC69661EVM 和 TLC69668EVM 配合使用。
驅動程式或資料庫

TLC696XX-DESIGN TLC696XX design resources

TLC696XX design resources
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SOT-23-THN (DYY) 14 Ultra Librarian
WSON (DRR) 12 Ultra Librarian

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