TLC6989
- Operating voltage VCC range: 2.5V to 5.5V
- SPI peripheral
- Data transfer rate up to 20MHz
- Support multiple peripherals with one controller
- Continuous Clock Serial Interface
(CCSI) Controller and Peripheral
- Data transfer rate up to 20MHz
- Programmable clock jitter for EMI enhancement
- Diagnostics
- Open-drain FAULT pin
- SPI communication loss detection
- CRC for SPI communication
- CCSI data integrity
- Data ready interrupt for availability of data
The TLC6989 SPI-compatible connectivity enables TLC698x device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the TLC698x device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.
TLC6989 incorporates reporting of faults in both the TLC698x daisy chain and TLC6989 internal. Data transmission of register and VSYNC commands to the TLC698x daisy chain is CRC protected by TLC6989. In addition, the data line is guarded by TLC6989 for stuck-at faults.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TLC6989 SPI-Compatible Connectivity for TLC698x Device Family datasheet | PDF | HTML | 2023/6/20 | ||
| 使用指南 | LP589x(-Q1)/TLC698x Sample Code User's Guide (Rev. A) | PDF | HTML | 2024/9/6 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT-23-THN (DYY) | 14 | Ultra Librarian |
| WSON (DRR) | 12 | Ultra Librarian |