TLC7733M

現行

具可編程時間延遲的 3.3V 系統單 SVS

產品詳細資料

Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 2.93 Features Complimentary output, Reset time delay, Separate VDD & sense, Undervoltage monitor only Reset threshold accuracy (%) 2.4 Iq (typ) (mA) 0.009 Output driver type/reset output Active-high, Active-low, Push-Pull Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Rating Military Watchdog timer WDI (s) None Operating temperature range (°C) -55 to 125
Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 2.93 Features Complimentary output, Reset time delay, Separate VDD & sense, Undervoltage monitor only Reset threshold accuracy (%) 2.4 Iq (typ) (mA) 0.009 Output driver type/reset output Active-high, Active-low, Push-Pull Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Rating Military Watchdog timer WDI (s) None Operating temperature range (°C) -55 to 125
CDIP (JG) 8 64.032 mm² 9.6 x 6.67 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Power-On Reset Generator
  • Automatic Reset Generation After Voltage Drop
  • Precision Voltage Sensor
  • Temperature-Compensated Voltage Reference
  • Programmable Delay Time by External Capacitor
  • Supply Voltage Range . . . 2 V to 6 V
  • Defined RESET Output from VDD ≥ 1 V
  • Power-Down Control Support for Static RAM With Battery Backup
  • Maximum Supply Current of 16 µA
  • Power Saving Totem-Pole Outputs
  • Temperature Range . . . Up to –55°C to 125°C
  • Power-On Reset Generator
  • Automatic Reset Generation After Voltage Drop
  • Precision Voltage Sensor
  • Temperature-Compensated Voltage Reference
  • Programmable Delay Time by External Capacitor
  • Supply Voltage Range . . . 2 V to 6 V
  • Defined RESET Output from VDD ≥ 1 V
  • Power-Down Control Support for Static RAM With Battery Backup
  • Maximum Supply Current of 16 µA
  • Power Saving Totem-Pole Outputs
  • Temperature Range . . . Up to –55°C to 125°C

The TLC77xx family of micropower supply voltage supervisors provide reset control, primarily in microcomputer and microprocessor systems.

During power-on, RESET is asserted when VDD reaches 1 V. After minimum VDD (≥ 2 V) is established, the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage (VI(SENSE)) remains below the threshold voltage. An internal timer delays return of the output to the inactive state to ensure proper system reset. The delay time, td, is determined by an external capacitor:

td = 2.1 × 104 × CT

Where

CT is in farads
td is in seconds

Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay time, td, has expired.

In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor, the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.)

The TLC77xxI is characterized for operation over a temperature range of –40°C to 85°C; the TLC77xxQ is characterized for operation over a temperature range of –40°C to 125°C; and the TLC77xxM is characterized for operation over the full Military temperature range of –55°C to 125°C.

The 3×3 mm DRB package is also available as a non-magnetic package for medical imaging application.

The TLC77xx family of micropower supply voltage supervisors provide reset control, primarily in microcomputer and microprocessor systems.

During power-on, RESET is asserted when VDD reaches 1 V. After minimum VDD (≥ 2 V) is established, the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage (VI(SENSE)) remains below the threshold voltage. An internal timer delays return of the output to the inactive state to ensure proper system reset. The delay time, td, is determined by an external capacitor:

td = 2.1 × 104 × CT

Where

CT is in farads
td is in seconds

Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay time, td, has expired.

In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor, the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.)

The TLC77xxI is characterized for operation over a temperature range of –40°C to 85°C; the TLC77xxQ is characterized for operation over a temperature range of –40°C to 125°C; and the TLC77xxM is characterized for operation over the full Military temperature range of –55°C to 125°C.

The 3×3 mm DRB package is also available as a non-magnetic package for medical imaging application.

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類型 標題 日期
* Data sheet MicroPower Supply Voltage Supervisors. datasheet (Rev. M) 2012年 3月 19日
* SMD TLC7733M SMD 5962-97509 2016年 6月 21日
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics 2019年 6月 28日
Application note Reset Circuit for the TMS320C6000 DSP (Rev. A) 1999年 6月 10日
More literature TLC7705M/5962-9751301QxA, TLC7733M/5962-9750901QxA 1997年 4月 1日

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CDIP (JG) 8 檢視選項
LCCC (FK) 20 檢視選項

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