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運算放大器 (op amps)
精密運算放大器 (Vos < 1mV)

TLV2369

現行

具有零交越失真的雙路 800-nA 1.8-V RRIO 運算放大器

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產品規格表

TLV2369

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 2 Offset drift (typ) (µV/°C) 0.5 Input bias current (max) (pA) 110 GBW (typ) (MHz) 0.012 Features Cost Optimized, EMI Hardened, Zero Crossover Slew rate (typ) (V/µs) 0.005 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.0008 Vn at 1 kHz (typ) (nV√Hz) 300 CMRR (typ) (dB) 110 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.01 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 0.025 Output swing headroom (to positive supply) (typ) (V) -0.025
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 2 Offset drift (typ) (µV/°C) 0.5 Input bias current (max) (pA) 110 GBW (typ) (MHz) 0.012 Features Cost Optimized, EMI Hardened, Zero Crossover Slew rate (typ) (V/µs) 0.005 Rail-to-rail In, Out Iq per channel (typ) (mA) 0.0008 Vn at 1 kHz (typ) (nV√Hz) 300 CMRR (typ) (dB) 110 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.01 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) 0 Output swing headroom (to negative supply) (typ) (V) 0.025 Output swing headroom (to positive supply) (typ) (V) -0.025
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm)
  • Cost-Optimized Precision Amplifier Power: 800 nA/Ch (Typ)
  • Low Offset Voltage: 400 µV (Typ)
  • Rail-to-Rail Input and Output
  • Zero-Crossover Distortion
  • Low Offset Drift: 0.5 µV/°C (Typ)
  • Gain-Bandwidth Product: 12 kHz
  • Supply Voltage: 1.8 V to 5.5 V
  • microSize Packages: SC70-5, VSSOP-8
  • Cost-Optimized Precision Amplifier Power: 800 nA/Ch (Typ)
  • Low Offset Voltage: 400 µV (Typ)
  • Rail-to-Rail Input and Output
  • Zero-Crossover Distortion
  • Low Offset Drift: 0.5 µV/°C (Typ)
  • Gain-Bandwidth Product: 12 kHz
  • Supply Voltage: 1.8 V to 5.5 V
  • microSize Packages: SC70-5, VSSOP-8

The TLV369 family of single and dual operational amplifiers represents a cost-optimized generation of 1.8-V nanopower amplifiers.

With the zero-crossover distortion circuitry, these amplifiers feature high linearity over the full common-mode input range with no crossover distortion, enabling true rail-to-rail input and operating from a 1.8-V to 5.5-V single supply. The family is also compatible with industry-standard nominal voltages of 3.0 V, 3.3 V, and 5.0 V.

The TLV369 (single version) is offered in a 5-pin SC70 package. The TLV2369 (dual version) comes in 8-pin VSSOP and SOIC packages.

The TLV369 family of single and dual operational amplifiers represents a cost-optimized generation of 1.8-V nanopower amplifiers.

With the zero-crossover distortion circuitry, these amplifiers feature high linearity over the full common-mode input range with no crossover distortion, enabling true rail-to-rail input and operating from a 1.8-V to 5.5-V single supply. The family is also compatible with industry-standard nominal voltages of 3.0 V, 3.3 V, and 5.0 V.

The TLV369 (single version) is offered in a 5-pin SC70 package. The TLV2369 (dual version) comes in 8-pin VSSOP and SOIC packages.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TLVx369 Cost-Optimized, 800-nA, 1.8-V, Rail-to-Rail I/O Operational Amplifier with Zero-Crossover Distortion datasheet PDF | HTML 2016/5/24
電子書 An Engineer’s Guide to Designing with Precision Amplifiers 2021/4/29
應用說明 Nano-Power Battery Monitoring in Personal Electronics 2017/12/8
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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模擬型號

TLV369 PSPICE Model (Rev. B)

SBOMA98B.ZIP (21 KB) - PSpice 模型
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模擬型號

TLV369 TINA-TI Reference Design

SBOMA97.TSC (135 KB) - TINA-TI 參考設計
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模擬型號

TLV369 TINA-TI Spice Model

SBOMA96.ZIP (6 KB) - TINA-TI Spice 模型
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計算工具

OPAMP-NOISECALC — Noise Calculator

This folder contains three tools to help in understandning and managing noise in cicuits. The included tools are:

  • A noise generator tool - This is a Lab View 4-Run Time executable that generates Gaussian white noise, uniform white noise, 1/f noise, short noise, and 60Hz line noise. Temporal data, (...)
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
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