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OPA4310 現行 四路、5.5-V、3-MHz、高輸出電流 (150 mA)、快速關機 (1 μs) 運算放大器 Better accuracy (1.4mV Vos max), higher output current (150mA)

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 1.5 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.15 Vn at 1 kHz (typ) (nV√Hz) 16 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 2 Features Cost Optimized, EMI Hardened Input bias current (max) (pA) 96 CMRR (typ) (dB) 96 Iout (typ) (A) 0.02 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) 0.2 Output swing headroom (to negative supply) (typ) (V) 0.005 Output swing headroom (to positive supply) (typ) (V) -0.005
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 3 Slew rate (typ) (V/µs) 1.5 Vos (offset voltage at 25°C) (max) (mV) 3 Iq per channel (typ) (mA) 0.15 Vn at 1 kHz (typ) (nV√Hz) 16 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 2 Features Cost Optimized, EMI Hardened Input bias current (max) (pA) 96 CMRR (typ) (dB) 96 Iout (typ) (A) 0.02 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) 0.2 Output swing headroom (to negative supply) (typ) (V) 0.005 Output swing headroom (to positive supply) (typ) (V) -0.005
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Low Offset Voltage: 0.75 mV (typ)
  • Low Input Bias Current: 1 pA (typ)
  • Wide Supply Range: 1.8 V to 5.5 V
  • Rail-to-Rail Input and Output
  • Gain Bandwidth: 3 MHz
  • Low IQ: 250 µA/Ch (max)
  • Low Noise: 16 nV/√Hz at 1 kHz
  • Internal RF/EMI Filter
  • Extended Temperature Range:
    –40°C to +125°C
  • Low Offset Voltage: 0.75 mV (typ)
  • Low Input Bias Current: 1 pA (typ)
  • Wide Supply Range: 1.8 V to 5.5 V
  • Rail-to-Rail Input and Output
  • Gain Bandwidth: 3 MHz
  • Low IQ: 250 µA/Ch (max)
  • Low Noise: 16 nV/√Hz at 1 kHz
  • Internal RF/EMI Filter
  • Extended Temperature Range:
    –40°C to +125°C

The TLV314 family of single-, dual-, and quad-channel operational amplifiers represents a new generation of low-power, general-purpose operational amplifiers. Rail-to-rail input and output swings (RRIO), low quiescent current (150 µA typically at 5 V) combine with a wide bandwidth of 3 MHz to make this family very attractive for a variety of battery-powered applications that require a good balance between cost and performance. Additionally, the TLV314 family architecture achieves a low input bias current of 1 pA, allowing for applications with MΩ source impedances.

The robust design of the TLV314 devices provides ease-of-use to the circuit designer: unity-gain stability, RRIO, capacitive loads of up to 300 pF, an integrated RF/EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM).

These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V), and are specified over the extended industrial temperature range of –40°C to +125°C.

The TLV314 (single) is available in both 5-pin SC70 and SOT-23 packages. The TLV2314 (dual) is offered in 8-pin SOIC and VSSOP packages. The quad-channel TLV4314 is offered in a 14-pin TSSOP package.

The TLV314 family of single-, dual-, and quad-channel operational amplifiers represents a new generation of low-power, general-purpose operational amplifiers. Rail-to-rail input and output swings (RRIO), low quiescent current (150 µA typically at 5 V) combine with a wide bandwidth of 3 MHz to make this family very attractive for a variety of battery-powered applications that require a good balance between cost and performance. Additionally, the TLV314 family architecture achieves a low input bias current of 1 pA, allowing for applications with MΩ source impedances.

The robust design of the TLV314 devices provides ease-of-use to the circuit designer: unity-gain stability, RRIO, capacitive loads of up to 300 pF, an integrated RF/EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM).

These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V), and are specified over the extended industrial temperature range of –40°C to +125°C.

The TLV314 (single) is available in both 5-pin SC70 and SOT-23 packages. The TLV2314 (dual) is offered in 8-pin SOIC and VSSOP packages. The quad-channel TLV4314 is offered in a 14-pin TSSOP package.

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類型 標題 日期
* Data sheet TLVx314 3-MHz, Low-Power, Internal EMI Filter, RRIO, Operational Amplifier datasheet (Rev. A) PDF | HTML 2016年 3月 22日
E-book Analog Engineer’s Pocket Reference Guide Fifth Edition (Rev. C) 2018年 11月 30日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

TLV314 PSpice Model (Rev. C)

SBOM974C.ZIP (23 KB) - PSpice Model
模擬型號

TLV314 TINA-TI Reference Design (Rev. A)

SBOM973A.ZIP (21 KB) - TINA-TI Reference Design
模擬型號

TLV314 TINA-TI Spice Model (Rev. A)

SBOM972A.ZIP (5 KB) - TINA-TI Spice Model
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN,並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器,讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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TSSOP (PW) 14 檢視選項

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