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數據轉換器
數位轉類比轉換器 (DAC)
精密 DAC (≤10 MSPS)

TLV5630

現行

具有內部參考的 2.7V 至 5.5V 12 位元 8 通道序列 DAC

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產品規格表

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open-in-new 比較替代產品
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DAC60508 現行 採用小巧 WCSP 封裝且具精確內部參考的真實 12 位元、8 通道、SPI、電壓輸出 DAC High precision with internal reference device with QFN 3mm by 3 mm package

TLV5630

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 12 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 6 Settling time (µs) 1 Reference type Ext, Int Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
Resolution (Bits) 12 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 6 Settling time (µs) 1 Reference type Ext, Int Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V, Low Power DAC with Power Down datasheet (Rev. F) 2008/11/14

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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TSSOP (PW) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
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