現在提供此產品的更新版本
功能相同，但針腳輸出與所比較的裝置不同。
TPS40200-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Input Voltage Range 4.5 V to 52 V
- Output Voltage (700 mV to 87% Vin)
- 200-mA Internal P-Channel FET Driver
- Voltage Feed-Forward Compensation
- Undervoltage Lockout
- Programmable Fixed-Frequency (35 kHz to 500 kHz) Operation
- Programmable Short-Circuit Protection
- Hiccup Overcurrent Fault Recovery
- Programmable Closed-Loop Soft Start
- 700-mV 1% Reference Voltage
- External Synchronization
- Small 8-Pin Small-Outline Integrated Circuit (SOIC) (D) Package
The TPS40200 is a flexible nonsynchronous controller with a built-in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52 V, with a power-saving feature that turns off driver current once the external FET has been fully turned on. This feature extends the flexibility of the device, allowing it to operate with an input voltage up to 52 V, without dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward input-voltage compensation that responds instantly to input-voltage change. The integral 700-mV reference is trimmed to 2%, providing the means to accurately control low voltages. The TPS40200 is available in an 8-pin SOIC, and supports many of the features of more complex controllers. Clock frequency, soft start, and overcurrent limit each are easily programmed by a single, external component. The part has undervoltage lockout, and can be easily synchronized to other controllers or a system clock to satisfy sequencing and/or noise-reduction requirements.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | Wide-Input-Range Nonsynchronous Voltage Mode Controller datasheet (Rev. A) | 2013/1/10 | |||
| * | 輻射及可靠性報告 | TPS40200MDREP Reliability Report | 2011/11/30 | |||
| * | VID | TPS40200-EP VID V6207618 | 2016/6/21 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。