TPS51604
- Reduced Dead-Time Drive Circuit for Optimized
CCM - Automatic Zero Crossing Detection for Optimized
DCM Efficiency - Multiple Low-Power Modes for Optimized Light-
Load Efficiency - Optimized Signal Path Delays for High-Frequency
Operation - Integrated BST Switch Drive Strength Optimized
for Ultrabook FETs - Optimized for 5-V FET Drive
- Conversion Input Voltage Range (VIN): 4.5 to 28 V
- 2-mm × 2-mm, 8-Pin, WSON Thermal Pad
Package
The TPS51604 drivers are optimized for high-frequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range.
The SKIP pin provides the option of CCM operation to support controlled management of the output voltage. In addition, the TPS51604 supports two low-power modes. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system.
The TPS51604 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm × 2-mm WSON package and operates from –40°C to 105°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS51604 Synchronous Buck FET Driver for High-Frequency CPU Core Power datasheet (Rev. B) | PDF | HTML | 2015年 10月 23日 |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 |
設計與開發
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| 封裝 | 引腳 | 下載 |
|---|---|---|
| WSON (DSG) | 8 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點