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TPS54325

現行

4.5V 至 18V 輸入、3A 同步降壓轉換器

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產品規格表

TPS54325

現行
產品規格表 立即訂購

產品詳細資料

Rating Catalog Topology Buck Iout (max) (A) 3 Vin (max) (V) 18 Vin (min) (V) 4.5 Vout (max) (V) 5.5 Vout (min) (V) 0.76 Features Enable, Power good, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.00085 Duty cycle (max) (%) 90
Rating Catalog Topology Buck Iout (max) (A) 3 Vin (max) (V) 18 Vin (min) (V) 4.5 Vout (max) (V) 5.5 Vout (min) (V) 0.76 Features Enable, Power good, Soft Start Adjustable, Synchronous Rectification Control mode D-CAP2 Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.00085 Duty cycle (max) (%) 90
HTSSOP (PWP) 14 32 mm² (5 mm × 6.4 mm)
  • D-CAP2™ Mode Enables Fast Transient Response
  • Low Output Ripple and Allows Ceramic Output Capacitor
  • Wide VCC Input Voltage Range: 4.5 V to 18 V
  • Wide VIN Input Voltage Range: 2.0 V to 18 V
  • Output Voltage Range: 0.76 V to 5.5 V
  • Highly Efficient Integrated FET’s Optimized for
    Lower Duty Cycle Applications – 120 mΩ (High Side)
    and 70 mΩ (Low Side)
  • High Efficiency, less than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Pre-Biased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle By Cycle Over Current Limit
  • Power Good Output
  • D-CAP2™ Mode Enables Fast Transient Response
  • Low Output Ripple and Allows Ceramic Output Capacitor
  • Wide VCC Input Voltage Range: 4.5 V to 18 V
  • Wide VIN Input Voltage Range: 2.0 V to 18 V
  • Output Voltage Range: 0.76 V to 5.5 V
  • Highly Efficient Integrated FET’s Optimized for
    Lower Duty Cycle Applications – 120 mΩ (High Side)
    and 70 mΩ (Low Side)
  • High Efficiency, less than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Pre-Biased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle By Cycle Over Current Limit
  • Power Good Output

The TPS54325 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54325 device enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution.

The main control loop for the TPS54325 uses the D-CAP2™ mode control which provides a very fast transient response with no external components. The TPS54325 also has a proprietary circuit that enables the device to adapt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VCC input , and from 2.0-V to 18-V VIN input power supply voltage. The output voltage can be programmed between 0.76 V and 5.5 V. The device also features an adjustable slow start time and a power good function. The TPS54325 is available in the 14 pin HTSSOP package, and designed to operate from –40°C to 85°C.

The TPS54325 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54325 device enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution.

The main control loop for the TPS54325 uses the D-CAP2™ mode control which provides a very fast transient response with no external components. The TPS54325 also has a proprietary circuit that enables the device to adapt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VCC input , and from 2.0-V to 18-V VIN input power supply voltage. The output voltage can be programmed between 0.76 V and 5.5 V. The device also features an adjustable slow start time and a power good function. The TPS54325 is available in the 14 pin HTSSOP package, and designed to operate from –40°C to 85°C.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS54325 4.5-V to 18-V, 3-A Output Synchronous Step Down Switcher with Integrated FET datasheet (Rev. F) PDF | HTML 2014/11/23
類比設計期刊 Control-Mode Quick Reference Guide (Rev. B) PDF | HTML 2023/8/29
應用說明 D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- 2013/1/2
應用說明 Understanding Thermal Dissipation and Design of a Heatsink 2011/5/4
類比設計期刊 Efficiency of synchronous versus nonsynchronous buck converters 2009/10/4

設計與開發

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開發板

TPS54325EVM — 5V 至 17V 輸入、3A 轉換器評估模組

The TPS54325EVM (evaluation module) is a fully assembled and tested circuit for evaluating the TPS54428 synchronous step-down converter. The EVM operates from a 4.5-V to 18-V input and provides a 1.05-V output up to 3-A load. The main control loop of TPS54325 uses D-CAP2™ mode control, which (...)

使用指南: PDF | HTML
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模擬型號

TPS54325 TINA-TI Reference Design

SLVM201.TSC (168 KB) - TINA-TI 參考設計
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TPS54325 TINA-TI Transient Spice Model

SLVM200.ZIP (40 KB) - TINA-TI Spice 模型
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TPS54325 Unencrypted PSpice Transient Model Package (Rev. A)

SLIM285A.ZIP (41 KB) - PSpice 模型
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參考設計

TIDA-010011 — 用於保護繼電器處理器模組的高效電源供應架構參考設計

此參考設計展示各種電源架構，可為需要 >1A 負載電流和高效率的應用處理器模組產生多重電壓軌。所需的電源是使用來自背板的 5、12 或 24-V DC 輸入所產生。電源供應器是使用配備整合式 FET 的 DC-DC 轉換器，以及具尺寸整合式電感器的電源模組所產生。此設計採用 HotRod™ 封裝類型，適合需要低 EMI 的應用。此外也最適合設計時間有限的應用。其他功能包括 DDR 終端穩壓器、輸入電源 OR-ing、電壓序列、用於過載保護的 eFuse，以及電壓和負載電流監控。此設計可搭配處理器、數位訊號處理器以及現場可編程邏輯閘陣列使用。已通過輻射發射測試，符合 A 類和 B 要求的 (...)
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HTSSOP (PWP) 14 Ultra Librarian
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