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TPS546D24A
- Split rail support: 2.95-V to 16-V PVIN; 2.95-V to 18-V AVIN (4-VIN VDD5 for switching)
- Integrated 4.5-mΩ/0.9-mΩ MOSFETs
- Average current mode control with selectable internal compensation
- 2×, 3×, 4× stackable with current sharing up to 160 A, supporting a single address per output
- Selectable 0.5-V to 5.5-V output via pin strap or 0.25-V to 5.5-V using PMBus VOUT_COMMAND
- Extensive PMBus command set with telemetry for VOUT, IOUT and internal die temperature
- Differential remote sensing with internal FB divider for < 1% VOUT error –40°C to +150°C TJ
- AVS and margining capabilities through PMBus
- MSEL pins pin programming PMBus defaults
- 12 Selectable switching frequencies from 225 kHz to 1.5 MHz (8 pin-strap options)
- Frequency sync in/sync out
- Supports prebiased output
- Supports strongly coupled inductor
- 7-mm × 5-mm × 1.5-mm, 40-pin QFN, pitch = 0.5 mm
- Create a Custom Design Using the TPS546D24A With WEBENCH Power Designer
The TPS546D24A is a highly integrated, non-isolated DC/DC converter capable of high frequency operation and 40-A current output from a 7-mm × 5-mm package. Two, three, and four TPS546D24A devices can be interconnected to provide up to 160 A on a single output. The device has an option to overdrive the internal 5-V LDO with an external 5-V supply via the VDD5 pin to improve efficiency and reduce power dissipation of the converter.
The TPS546D24A uses a proprietary fixed-frequency current-mode control with input feedforward and selectable internal compensation components for minimal size and stability over a wide range of output capacitances.
The PMBus interface with 1-MHz clock support gives a convenient, standardized digital interface for converter configuration as well as monitoring of key parameters including output voltage, output current, and internal die temperature. Response to fault conditions can be set to restart, latch off, or ignore, depending on system requirements. Back-channel communication between stacked devices enables all TPS546D24A converters powering a single output rail to share a single address to simplify system software/firmware design. Key parameters including output voltage, switching frequency, soft-start time, and overcurrent fault limits can also be configured through BOM selection without PMBus communication to support program free power-up.
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LQFN-CLIP (RVF) | 40 | Ultra Librarian |
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。