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電源管理
多通道 IC (PMIC)

TPS65218D0

現行

適用於 ARM® Cortex™-A8/A9 SOC 和 FPGA 的整合電源管理 IC (PMIC)

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產品規格表

TPS65218D0

現行
產品規格表 立即訂購

產品詳細資料

Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Product type Processor and FPGA Regulated outputs (#) 7 Step-down DC/DC converter 5 Step-up DC/DC converter 1 LDO 1 Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Configurability Factory programmable, Software configurable, User programmable Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Rating Catalog Operating temperature range (°C) -40 to 105 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.025 Switching frequency (max) (kHz) 2400 Switching frequency (typ) (kHz) 2400
Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Product type Processor and FPGA Regulated outputs (#) 7 Step-down DC/DC converter 5 Step-up DC/DC converter 1 LDO 1 Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Configurability Factory programmable, Software configurable, User programmable Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Rating Catalog Operating temperature range (°C) -40 to 105 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.025 Switching frequency (max) (kHz) 2400 Switching frequency (typ) (kHz) 2400
HTQFP (PHP) 48 81 mm² (9 mm × 9 mm) VQFN (RSL) 48 36 mm² (6 mm × 6 mm)
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).
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TPS65219 現行 適用於 Arm® Cortex®-A53 處理器和 FPGA 的整合式電源管理 (PMIC) TPS65219 has higher current capability, more LDOs, supports lower output voltages, has no Buck-Boost nor Coin Cell-backup support and a smaller package size

技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS65218D0 Power Management for ARM Cortex-A8/A9 SOCs and FPGAs datasheet (Rev. B) PDF | HTML 2018/9/28
應用說明 Powering Processors and FPGAs With a Single Family of PMICs (Rev. A) 2020/4/14
應用說明 TPS6521815 Power Management IC (PMIC) for Industrial Applications (Rev. A) 2020/2/28
使用指南 Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B) 2020/2/27
應用說明 How to Design Flexible Processor Power Systems Using PMICs (Rev. B) 2020/1/27
Application brief Powering the NXP i.MX 6Solo, 6DualLite with the TPS6521815 PMIC (Rev. A) PDF | HTML 2019/12/9
Application brief Powering the NXP i.MX 8M Mini and Nano with the TPS6521825 and LP873347 PMICs (Rev. B) PDF | HTML 2019/12/9
Application brief Powering the NXP i.MX 7 Processor with the TPS6521815 PMIC (Rev. A) PDF | HTML 2019/12/9
應用說明 AM335x PMIC Selection Guide (Rev. A) 2019/9/19
應用說明 Basic Calculations of a 4 Switch Buck-Boost Power Stage (Rev. B) 2018/7/9
Third party document Optimizing power delivery with PMICs 2017/12/12
白皮書 Simple power rail sequencing solutions for complex multi-rail systems 2016/7/6
應用說明 Basic Calculation of a Buck Converter's Power Stage (Rev. B) PDF | HTML 2015/8/17
白皮書 Advantages of PMIC converters with enhanced hysteretic-mode control 2015/3/30

設計與開發

電源供應解決方案

探索包括 TPS65218D0 的解決方案。TI 提供適用於 TI 與非 TI 之系統單晶片 (SoC)、處理器、微控制器、感測器或現場可編程邏輯閘陣列 (FPGA) 的電源供應解決方案。

檢視解決方案
開發板

BOOSTXL-TPS65218 — TPS65218 客戶編程 BoosterPack

TPS65218 客戶編程 BoosterPack 使用 MSP430F5529 啟動器，以讓客戶編程 TPS65218D0 電源管理 IC 的非揮發性記憶體。BOOSTXL-TPS65218 具備一個在焊接到 TPS65218EVM-100 或客戶電路板之前用於編程單元的通訊端。
使用指南: PDF
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開發板

TMDXEVM438X-EPOS — AM438x 電子銷售點 (EPOS) 評估模組

AM438x 電子銷售點 (EPOS) 評估模組 (EVM) 可協助開發者評估 TI Sitara™ AM438x 處理器系列（AM4382、AM4384 和 AM4388），並開始建構各類銷售點 (POS) 應用，例如：手持式電子金融交易 (EFT) 終端、密碼輸入鍵盤、行動/可攜式 POS 終端、自動販賣機、加油站油料分配器、ATM、電動車充電站等。

附註：  請注意，此 EVM 需要核准才能購買及取得軟體存取權。使用「立即訂購」表格中的「要求」按鈕提交要求。
使用指南: PDF
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開發板

TPS65218EVM-100 — TPS65218 評估模組

TPS65218EVM 是一個已完成組裝的平台，用於評估 TPS65218 電源管理裝置的性能。

使用指南: PDF | HTML
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開發模組 (EVM) 的 GUI

IPG-UI — IPG-UI EVM GUI (Windows Installer)

IPG-UI GUI 可用於配置多部 PMIC 裝置，以評估這些裝置的功能和性能。  此 GUI 使用 Web 型技術建立，支援使用 USB2ANY 轉接器電路板與 EVM 硬體互動。提供 USB2ANY Explorer，允許將 USB2ANY 轉接器電路板上的韌體更新到所需的版本 (2.7.0.0 或更高版本)。

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開發模組 (EVM) 的 GUI

IPG-UI-LINUX — IPG-UI EVM GUI (Linux Installer)

IPG-UI GUI 可用於配置多部 PMIC 裝置，以評估這些裝置的功能和性能。  此 GUI 使用 Web 型技術建立，支援使用 USB2ANY 轉接器電路板與 EVM 硬體互動。提供 USB2ANY Explorer，允許將 USB2ANY 轉接器電路板上的韌體更新到所需的版本 (2.7.0.0 或更高版本)。

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開發模組 (EVM) 的 GUI

IPG-UI-OSX — IPG-UI EVM GUI (OSX Installer)

IPG-UI GUI 可用於配置多部 PMIC 裝置，以評估這些裝置的功能和性能。  此 GUI 使用 Web 型技術建立，支援使用 USB2ANY 轉接器電路板與 EVM 硬體互動。提供 USB2ANY Explorer，允許將 USB2ANY 轉接器電路板上的韌體更新到所需的版本 (2.7.0.0 或更高版本)。

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開發模組 (EVM) 的 GUI

SLVC750 — BOOSTXL-TPS65218 IPG-UI Device Support File

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模擬型號

TPS65218xx PSpice Transient Model

SLDM022.ZIP (1460 KB) - PSpice 模型
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參考設計

TIDA-00478 — 透過電源管理 IC 為 Xilinx Zynq 7000 系列 FPGA 供電的參考設計

此 TPS65218 架構參考設計是適用於 Xilinx® Zynq® 7010 SoC/FPGA (屬於 Zynq® 7000 系列產品) 的精巧、整合式電源解決方案。此設計展現為了供電至 Zynq® 7010 SoC/FPGA，可使用 TPS65218 作為多合一 PMIC 來對所需的五個軌供電。TPS65218 為 Zynq® 7010 的五個電源軌供電所需的總電路板面積 (包括被動元件) 只有 1.594 in2。TPS65218 可靈活支援 DDR3L 或 DDR3 記憶體。此電源管理 IC 可透過單一 5V 電源或單芯鋰離子電池執行。此設計保證能在工業溫度範圍 (...)

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參考設計

TIDA-00606 — Altera Cyclone V 電源參考設計

此 TPS65218 架構參考設計是適用於 Altera® Cyclone® V (E, GX, GT) SoC（屬於 Cyclone® 系列產品）的精巧、整合式電源解決方案。此設計展現為了供電至 Cyclone® V E, GX & GT SoC，可使用 TPS65218 作為多合一 IC 來對所需的軌供電。TPS65218 為 Cyclone® V 的五個電源軌供電所需的總電路板面積（包括被動元件）只有 1.594 in2。TPS65218 可靈活支援 DDR3L 或 DDR3 記憶體。此電源管理 IC 可透過單一 5V (...)

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參考設計

TIDA-00607 — Altera MAX 10 FPGA 電源參考設計

此參考設計是適用 Altera® MAX® 10 SoC（屬於 MAX® 系列產品）的精巧、整合式電源設計。此設計展現為了供電至 MAX® 10 SoC，可使用 TPS65218 作為多合一 IC 來對所需的軌供電。Altera 為 MAX 10 提供單電源與雙電源解決方案。此設計適用於 MAX 10 雙電源。為 MAX® 10 的電源軌供電所需的總電路板面積（包括被動元件）只有 1.594in2。TPS65218 可靈活支援 DDR3L 或 DDR3 記憶體。另整合 3 個負載開關，允許使用外部週邊設備，以補償系統耗電量。此設計可透過單一 5V (...)

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參考設計

TIPA-050024 — 適用於工業應用，採用 TPS65218D0 PMIC 的 AM335x、AM437x 和 AM438x 電源供應設計

此電源供應設計說明可為 AM335x 和 AM43x 處理器供電的最佳化電源管理 IC (PMIC)。使用指南是 TPS65218D0 (PMIC) 與 AM335x、AM437x 或 AM438x 處理器間連線的參考。TPS65218D0 裝置為單晶片使用者可編程 PMIC，可為 AM335x 處理器系列供電，適用於可攜式 (鋰離子電池) 及線路供電式 (5V) 應用。

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HTQFP (PHP) 48 Ultra Librarian
VQFN (RSL) 48 Ultra Librarian
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