TPS7H6200-SEP
- Total ionizing dose (TID) characterized up to 50krad(Si)
- Destructive Single Event Effects (DSEE)
characterized
- Single-event latchup (SEL), single-event burnout (SEB), and single-event gate rupture (SEGR) immune up to linear energy transfer LET = 43MeV⋅cm2/mg
- Single Event Effects
characterized
- Single-event functional interrupt (SEFI) and single-event transient (SET) characterized up to LET = 43MeV⋅cm2/mg
- Available in military (–55°C to 125°C) temperature
- 3.2mΩ (typ) high side FET RDSON, 1mΩ low side FET RDSON
- High efficiency (VPVIN = 12V,
VVOUT = 0.8V, fSW = 500kHz, TA =25°C, L =
200nH, DCR = 180mΩ):
- η = 89.6% at 20A
- η = 87.2% at 40A
- η = 84.9% at 52A
- 52A maximum continuous current
- Integrated low-side current
sense
- Total RSS accuracy of 14.5% for nominal load currents greater than 40A
- Fault pin indicator for overcurrent, overtemperature, or UVLO detection
- DrMOS 3.3V and 5V PWM input signal compatibility
- Integrated overtemperature and overcurrent protection
The TPS7H6200-SEP is a 15V e-mode GaN power-FET with integrated gate driver featuring tri-state PWM compatibility, integrated low side current sense, overtemperature protection, and overcurrent protection.
The GaN FET half-bridge die combines the high-side and low-side GaN FETs on one substrate, minimizing parasitic inductance. The device is asymmetrically sized for point-of-load voltage conversion, 1mΩ on the low side and 3mΩ on the high side, optimizing performance and efficiency for typical input to output conversion ratios. As a result, the TPS7H6200-SEP can achieve efficiencies exceeding 89.6% at a typical load of 20A.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TPS7H6200-SEP Radiation-Tolerant 52A GaN Half-Bridge Power Stage with Low-Side Current Sense datasheet | PDF | HTML | 2026/9/23 |
設計與開發
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TPS7H5101EVM — TPS7H5101-SEP 評估模組
TPS7H5101-SEP 評估模組 (EVM) 是一款雙相 D-CAP+™ 降壓轉換器，適用於低輸出電壓下的高電流負載。此控制器針對 0.8V、80A 的負載點電源供應進行最佳化，並使用兩個 TPS7H6200-SEP 裝置來完成電源轉換。此 EVM 採用 D-CAP+ 架構的進階控制功能，在低輸出電容下提供快速暫態響應與高效率。此 EVM 進一步採用 DROOP 補償，使其能使用更低的輸出電容，以符合低輸出電壓容差要求。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN-FCRLF (VEJ) | 49 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。