UC2875

現行

具有 10.75V/9.25V UVLO、-25°C 至 85°C 的雙極相位移位全橋控制器

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UCC28951 現行 具 SR 控制且適用寬輸入電壓範圍的綠色相移全橋控制器 Programmable delays, SR control, higher duty cycle and current limit

產品詳細資料

Vin (max) (V) 20 Operating temperature range (°C) -25 to 85 Control mode Current, Feedforward, Voltage Topology Phase-shifted full bridge Rating Military Duty cycle (max) (%) 100
Vin (max) (V) 20 Operating temperature range (°C) -25 to 85 Control mode Current, Feedforward, Voltage Topology Phase-shifted full bridge Rating Military Duty cycle (max) (%) 100
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 28 184.37 mm² 17.9 x 10.3
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode Topologies
  • Practical Operation at Switching Frequencies to 1MHz
  • Four 2A Totem Pole Outputs
  • 10MHz Error Amplifier
  • Undervoltage Lockout
  • Low Startup Current—150µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Over-Current Comparator With Full Cycle Restart
  • Trimmed Reference
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode Topologies
  • Practical Operation at Switching Frequencies to 1MHz
  • Four 2A Totem Pole Outputs
  • 10MHz Error Amplifier
  • Undervoltage Lockout
  • Low Startup Current—150µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Over-Current Comparator With Full Cycle Restart
  • Trimmed Reference

The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This family of circuits may be configured to provide control in either voltage or current mode operation, with a separate over-current shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2MHz, overall switching frequencies to 1MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75V threshold. 1.5V hysteresis is built in for reliable, boot-strapped chip supply. Over-current protection is provided, and will latch the outputs in the OFF state within 70nsec of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with band-width in excess of 7MHz, a 5V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

These devices are available in 20-pin DIP, 28-pin "bat-wing" SOIC and 28 lead power PLCC plastic packages for operation over both 0°C to 70°C and –25°C to +85°C temperature ranges; and in hermetically sealed cerdip, and surface mount packages for –55°C to +125°C operation.

The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This family of circuits may be configured to provide control in either voltage or current mode operation, with a separate over-current shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2MHz, overall switching frequencies to 1MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75V threshold. 1.5V hysteresis is built in for reliable, boot-strapped chip supply. Over-current protection is provided, and will latch the outputs in the OFF state within 70nsec of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with band-width in excess of 7MHz, a 5V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

These devices are available in 20-pin DIP, 28-pin "bat-wing" SOIC and 28 lead power PLCC plastic packages for operation over both 0°C to 70°C and –25°C to +85°C temperature ranges; and in hermetically sealed cerdip, and surface mount packages for –55°C to +125°C operation.

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類型 標題 日期
* Data sheet Phase Shift Resonant Controller datasheet (Rev. C) 2007年 5月 24日
Application note Phase Shifted Full Bridge, Zero Voltage Transition Design Considerations (Rev. A) 2011年 1月 22日
More literature Seminar 800 Topic 5 - Fixed-Frequency Resonant-Switched PWM 2001年 2月 15日
More literature Seminar 900 Topic 3 - Designing a Phase-Shifted ZVT Power Converter 2001年 2月 15日
More literature Seminar 900 Topic 4 - 500-W 40-W/in3 Phase-Shifted ZVT Power Converter 2001年 2月 15日

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開發板

UCC3895EVM-001 — UCC3895 評估模組

The UCC3895EVM-001 is an isolated 48V input phase shifted full bridge converter providing an output of 3.3V at 15A. Using the AB outputs of the UCC3895, a novel technique for direct control driven synchronous rectification is demonstrated.

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PDIP (N) 20 檢視選項
SOIC (DW) 28 檢視選項

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