UCC21521
- Universal: dual low-side, dual high-side or half-bridge driver
- Operating temperature range –40 to +125°C
- Switching parameters:
- 19-ns typical propagation delay
- 10-ns minimum pulse width
- 5-ns maximum delay matching
- 6-ns maximum pulse-width distortion
- Common-mode transient immunity (CMTI) greater than 100 V/ns
- Surge immunity up to 12.8 kV
- Isolation barrier life >40 years
- 4-A peak source, 6-A peak sink output
- TTL and CMOS compatible inputs
- 3-V to 18-V input VCCI range to interface with both digital and analog controllers
- Up to 25-V VDD output drive supply
- 5-V, 8-V, 12-V VDD UVLO options
- Programmable overlap and dead time
- Rejects input pulses and noise transients shorter than 5 ns
- Fast enable for power sequencing
- Wide body SOIC-16 (DW) package
- Safety-related certifications:
- 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
- 5700-VRMS Isolation for 1 minute per UL 1577
- CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
- CQC certification per GB4943.1-2011
The UCC21521 is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.
The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.
Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). The EN pin pulled low shuts down both outputs simultaneously and allows for normal operation when left open or pulled high. As a fail-safe measure, primary-side logic failures force both outputs low.
The device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21521 enables high efficiency, high power density, and robustness in a wide variety of power applications.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | UCC21521 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver with Enable datasheet (Rev. B) | PDF | HTML | 2021/12/8 | ||
| 證書 | VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. AB) | 2026/7/15 | ||||
| 證書 | UL Certification E181974 Vol 4. Sec 7 (Rev. D) | 2025/9/8 | ||||
| 證書 | UCC215xx CQC Certificate of Product Certification | PDF | HTML | 2023/8/17 | |||
| 證書 | UCC21520 CQC Certificate of Product Certification (Rev. A) | PDF | HTML | 2023/8/16 | |||
| Application brief | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 2021/12/16 | |||
| 證書 | FPPT2 - Nonoptical Isolating Devices UL 1577 Certificate of Compliance | 2021/10/26 | ||||
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020/2/28 | ||||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020/2/28 | ||||
| 證書 | CSA Product Certificate (Rev. A) | 2019/8/15 | ||||
| 技術文章 | Why capacitive isolation: a vital building block for sensors in smart cities | PDF | HTML | 2018/1/16 |
設計與開發
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UCC21520EVM-286 — UCC21520 4A/6A 隔離式雙通道閘極驅動器評估模組
UCC21520EVM-286 專為評估 UCC21520DW 而設計,這是一款具備 4 A 源極和 6-A 汲極峰值電流能力的隔離式雙通道閘極驅動器。此 EVM 可做為驅動功率 MOSFETS、IGBTS 和 SiC MOSFETS 的參考設計,並提供 UCC21520 針腳功能識別、元件選擇指南與 PCB 配置範例。
UCC21521CEVM-286 — UCC21521C 4A/6A 隔離式雙通道閘極驅動器評估模組
UCC21521CEVM-286 專為評估 UCC21521CDW 而設計,該裝置為隔離式雙通道閘極驅動器,具備 4A 源極與 6A 汲極峰值電流、12V UVLO 以及啟用(高電位作動)功能。此 EVM 可做為驅動功率 MOSFETS、IGBTS 和 SiC MOSFETS 的參考設計,並提供 UCC21521C 針腳功能識別、元件選擇指南與 PCB 配置範例。
SLURAZ5 — UCC21520 Bootstrap Calculator 1.0
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (DW) | 16 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。