UCC21541
- Wide body package options
- DW SOIC-16: pin-2-pin to UCC21520
- DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
- Up to 4A peak source and 6A peak sink output
- Up to 18V VDD output drive supply
- 5V and 8V VDD UVLO options
- CMTI greater than 125V/ns
- Switching parameters:
- 33ns typical propagation delay
- 6ns maximum pulse-width distortion
- 10µs maximum VDD power-up delay
- Resistor-programmable dead time
- TTL and CMOS compatible inputs
- Safety-related
certifications
(planned):
- 8000VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
- 5700VRMS isolation for 1 minute per UL 1577
- CQC certification per GB4943.1-2022
The UCC2154x is an isolated dual channel gate driver family designed with up to 4 A/6 A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing, which facilitates higher bus voltage.
The UCC2154x family can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).
Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3mm Channel-to-Channel Spacing Option datasheet (Rev. E) | PDF | HTML | 2024/11/8 | ||
| 證書 | UCC21540 CQC Certificate of Product Certification | PDF | HTML | 2023/8/17 | |||
| Application brief | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 2021/12/16 | |||
| 證書 | CQC19001226951 | 2021/2/5 | ||||
| 測試報告 | Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design | 2020/4/24 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
UCC21540EVM — 具有 3.3mm 通道至通道間距的 5.0-kVrms 絕緣式雙通道閘極驅動器
PMP40500 — 54-VDC 輸入、12-V 42-A 輸出半橋參考設計
此 12-V、42-A 輸出半橋式參考設計適合有線網路園區與分公司交換器中的匯流排轉換器。此設計具高效率及各種故障保護 (過電流和短路)。此設計採用 3 kVRMS 基本及功能隔離式閘極驅動器 UCC21220D, UCC21220AD, UCC21222D 及 5.7-kRMS 強化隔離式閘極驅動器 UCC21540D, UCC21540DWK and UCC21541DW 以提供效率比較。
TIDA-010210 — 以 GaN 為基礎的 11kW、雙向、三相 ANPC 參考設計
此參考設計提供實作三階三相氮化鎵 (GaN) 型 ANPC 逆變器功率級的設計範本。使用快速切換功率裝置可在更高的 100 kHz 頻率進行切換、減少濾波器的磁性元件尺寸,以及提升功率級的功率密度。多階拓撲允許在高達 1000 V 的較高 DC 匯流排電壓下使用 600-V 額定電源裝置。低切換電壓應力減少切換損耗,導致峰值效率達 98.5%。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (DW) | 16 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。