計算工具
UCC27536
- Low-cost gate driver (offering optimal solution for driving FET and IGBTs)
- Superior replacement to discrete transistor pair drive (providing easy interface with controller)
- TTL and CMOS compatible input logic threshold (independent of supply voltage)
- Split output options allow for tuning of turnon and turnoff currents
- Inverting and noninverting input configurations
- Enable with fixed TTL compatible threshold
- High 2.5-A source and 2.5-A or 5-A sink peak drive currents at 18-V VDD
- Wide VDD range from 10 V to 35 V
- Input and enable pins capable of with standing up to –5-V DC below ground
- Output held low when inputs are floating or during VDD UVLO
- Fast propagation delays (17-ns Typical)
- Fast rise and fall times
(15-ns and 7-ns typical with 1800-pF Load) - Undervoltage lockout (UVLO)
- Used as a high-side or low-side driver (if designed with proper bias and signal isolation)
- Low-cost, space-saving 5-pin or 6-pin DBV (SOT-23) package options
- UCC27536 and UCC27537 pin-to-pin compatible to TPS2828 and TPS2829
- Operating temperature range of –40°C to 140°C
The UCC2753x single-channel, high-speed gate drivers can effectively drive MOSFET and IGBT power switches. Using a design that allows for a source of up to 2.5 A and 5-A sink through asymmetrical drive (split outputs), coupled with the ability to support a negative turn-off bias, rail-to-rail drive capability, extremely small propagation delay (17 ns typical), the UCC2753x devices are ideal solutions for MOSFET and IGBT power switches. The UCC2753x family of devices can also support enable, dual input, and inverting and non-inverting input functionality. The split outputs and strong asymmetrical drive boost the devices immunity against parasitic Miller turn-on effect and can help reduce ground debouncing.
Leaving the input pin open holds the driver output low. The logic behavior of the driver is shown in the application diagram, timing diagram, and input and output logic truth table.
Internal circuitry on VDD pin provides an undervoltage lockout function that holds output low until VDD supply voltage is within operating range.
技術文件
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檢視所有 8 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | UCC2753x 2.5-A and 5-A, 35-VMAX VDD FET and IGBT Single-Gate Driver datasheet (Rev. G) | PDF | HTML | 2019年 4月 17日 |
| Application note | Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) | PDF | HTML | 2023年 9月 8日 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Implementing a Bipolar Gate Drive for Low-Side IGBTs and SiC FETs in Motor Drive | 2019年 10月 10日 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 2018年 3月 16日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
UCC27531EVM-184 — UCC27531 評估模組
The UCC27531EVM-184 is a fully isolated Gate Driver Daughter Card that provides a test platform for a quick and easy evaluation of the UCC27531DBV driver. Powered by a single +12V external supply, and featuring a comprehensive set of test points and jumpers, this EVM can be used for the evaluation (...)
使用指南: PDF
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| 封裝 | 引腳 | 下載 |
|---|---|---|
| SOT-23 (DBV) | 5 | 檢視選項 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點