CDC7005QFN-EVM

CDC7005 QFN Package Evaluation Module

CDC7005QFN-EVM

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Overview

The CDC7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.

The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements by selecting the external VCXO, loop filter components, frequency for PFD, and charge pump current.

As the system requires external components like a loop filter and VCXO, this EVM provides an excellent way to evaluate and modify the performance and parameters of the clock system in conjunction with the specific customer application.

This EVM is for QFN package evaluation. For BGA package, please see CDC7005-EVM.

  • Operates up to 800 MHz
  • Loop bandwidth can be selected as low as 10 Hz or less to clean the system's clock jitter
  • Can be used as a simple 1:5 LVPECL buffer with output dividing options
  • Differential outputs programmable by serial peripheral interface (SPI)
Clock jitter cleaners & synchronizers
CDCM7005 High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO

 

Clock generators
CDC7005 High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO
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Evaluation board

CDC7005QFN-EVM – CDC7005 QFN Package Evaluation Module

Support software

CDC7005 SPI Software with Labview 8.0 Runtime Engine (Rev. A) – SCAC037A.ZIP (55329KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
More literature CDC7005QFN-EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide CDC7005 (QFN Package) Evaluation Module Manual (Rev. B) Mar. 28, 2006

Related design resources

Hardware development

EVALUATION BOARD
CDC7005-EVMCDC7005 Evaluation Module
CDCM7005BGA-EVMCDCM7005 BGA Package Evaluation Module
CDCM7005QFN-EVMCDCM7005 QFN Package Evaluation Module

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