CDCDB800EVM

CDCDB800 evaluation module is an 8-output LP-HCSL clock buffer for PCIe® Gen 1 to Gen 5 application

CDCDB800EVM

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Overview

CDCDB800 evaluation module is an 8-output LP-HCSL, DB800ZL compliant, clock buffer capable of distributing the reference clock for PCIe® Gen 1 to Gen 5 application, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces. The SMBus interface and eight outputs enable pins to allow the configuration and control of all eight outputs individually. The CDCDB800 is a DB800ZL derivative buffer and meets or exceeds the system parameters in the DB800ZL and DB2000Q specifications.

Features
  • Easy to use evaluation board to fanout up to 8 LP-HCSL clocks
  • Output enable pin configurable through DIP switch
  • Board powered from a single 3.3 V supply
Clock buffers
CDCDB400 4-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB800 8-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB803 8-output clock buffer for PCIe® Gen 1 to Gen 5 with selectable SMBus addresses

Get started

  1. Order the CDCDB800EVM
  2. Download and install TICSPRO-SW
  3. Read the CDCDB800EVM user’s guide
  4. Configure registers on TICSRPRO-SW

Order & start development

Evaluation board

CDCDB800EVM — CDCDB800 evaluation module is an 8-output LP-HCSL clock buffer for PCIe® Gen 1 to Gen 5 application

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TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* EVM User's guide CDCDB800/803 Ultra-Low Additive Jitter, 8-Output PCIe Gen1 to Gen5 Clock Buffer Jul. 16, 2021
Certificate CDCDB800EVM EU Declaration of Conformity (DoC) Jul. 08, 2021

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