LMK00338 PCIe Gen1/2/3 Clock Buffer Evaluation Module


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The LMK00338 is a 400MHz, 8-output HCSL buffer intended for PCIe Gen1/2/3 Applications, low additive jitter clock distribution and level translation. The EVM allows the user to verify the functionality and performance specification of the device. Refer to the LMK00338 datasheet for the functional description and specifications.

  • Low-noise clock fan-out with two banks of four HCSL outputs each and one LVCMOS output
  • 3:1 input multiplexer with two universal input buffers and one crystal oscillator interface, selectable via control pins
  • Includes DIP switches to configure control pins
  • 3.3 V core and independent 3.3 V/2.5 V output supplies per output bank using onboard regulator options or direct supply inputs
  • Flexible input/output interface with controlled-impedance traces and edge SMA connectors
Clock buffers
LMK00334 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00334-Q1 Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00338 8-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator
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Evaluation board

LMK00338EVM — LMK00338 Evaluation Module

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Technical documentation

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Type Title Date
Certificate LMK00338EVM EU Declaration of Conformity (DoC) 02 Jan 2019
EVM User's guide LMK00338EVM User's Guide 13 Dec 2013

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