This reference design addresses Xilinx Versal adaptive compute acceleration platform (ACAP) requirements and consists of a power management integrated circuit (PMIC) for system rails plus a multiphase controller and power stages to support higher current processor loads. On-board dynamic loads on the critical outputs allow testing to Xilinx's demanding power requirements. PMP22165 along with the TPS53681 EVM is a tested solution offering performance with components to meet processor requirements for Versal’s most common use cases one and three.
| Output voltage options | PMP22165.1 | PMP22165.2 | PMP22165.3 | PMP22165.4 | PMP22165.5 | PMP22165.6 | PMP22165.7 | PMP22165.8 | PMP22165.9 |
|---|---|---|---|---|---|---|---|---|---|
| Vin (Min) (V) | 7 | 7 | 1.5 | 7 | 3.2 | 3.3 | 3.2 | 3.2 | 7 |
| Vin (Max) (V) | 14 | 14 | 1.5 | 14 | 3.4 | 3.3 | 3.4 | 3.4 | 14 |
| Vout (Nom) (V) | 3.3 | 1.5 | 1.5 | 1.2 | .88 | 3.3 | 2.5 | 1.1 | .8 |
| Iout (Max) (A) | 4 | 4 | .2 | 4.8 | 3.1 | .5 | .5 | .5 | 165 |
| Output Power (W) | 13.2 | 6 | .3 | 5.76 | 2.728 | 1.65 | 1.25 | .55 | 132 |
| Isolated/Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated | Non-Isolated |
| Input Type | DC | DC | DC | DC | DC | DC | DC | DC | DC |
| Topology | Buck- Synchronous | Buck- Synchronous | Other | Buck- Synchronous | Buck- Synchronous | Other | Buck- Synchronous | Buck- Synchronous | Buck- Multiphase |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Download ready-to-use system files to speed your design process.
Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Tool for calculating critical component values required in the reference design
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | Power for Xilinx Versal Adaptive Compute Acceleration Platform Reference Design | May 14, 2020 |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.