Product details

Regulated outputs (#) 13 Vin (Min) (V) 5.6 Vin (Max) (V) 21 Iout (Max) (A) 25 Rating Catalog Step-down DC/DC controller 3 Step-down DC/DC converter 3 Step-up DC/DC controller 0 Step-up DC/DC converter 0 LDO 4 Iq (Typ) (mA) 0.3 Features Comm Control, Dynamic Voltage Scaling, Enable, Enable Pin, I2C Control, Over Current Protection, Power Good, Power Sequencing, Synchronous Rectification, Thermal Shutdown, UVLO Fixed Operating temperature range (C) -40 to 85 Processor name Various - configurable settings Processor supplier Various - configurable settings Shutdown current (ISD) (Typ) (uA) 65 Configurability Software configurable, User programmable
Regulated outputs (#) 13 Vin (Min) (V) 5.6 Vin (Max) (V) 21 Iout (Max) (A) 25 Rating Catalog Step-down DC/DC controller 3 Step-down DC/DC converter 3 Step-up DC/DC controller 0 Step-up DC/DC converter 0 LDO 4 Iq (Typ) (mA) 0.3 Features Comm Control, Dynamic Voltage Scaling, Enable, Enable Pin, I2C Control, Over Current Protection, Power Good, Power Sequencing, Synchronous Rectification, Thermal Shutdown, UVLO Fixed Operating temperature range (C) -40 to 85 Processor name Various - configurable settings Processor supplier Various - configurable settings Shutdown current (ISD) (Typ) (uA) 65 Configurability Software configurable, User programmable
VQFN (RSK) 64 64 mm² 8 x 8
  • Two Banks of One-Time Programmable Memory for Programming Default Voltages and Sequence
  • Wide VIN Range From 5.6 V to 21 V
  • Three Variable-Output Voltage Synchronous
    Step-Down Controllers With D-CAP2™ Topology
    • Scalable Output Current Using External FETs With Selectable Current Limit
    • I2C DVS Control From 0.41 V to 1.67 V in
      10-mV Steps or 1 V to 3.575 V in 25-mV Steps or Fixed 5 V Output
  • Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology
    • VIN Range From 3 V to 5.5 V
    • Up to 3 A of Output Current
    • I2C DVS Control From 0.425 V to 3.575 V in 25-mV Steps
  • Three LDO Regulators With Adjustable Output Voltage
    • LDOA1: I2C-Selectable Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2 and LDOA3: I2C-Selectable Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current Each
  • VTT LDO for DDR Memory Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • 5-V Fixed-Output Voltage LDO (LDO5)
    • Power Supply for Gate Drivers of SMPS and for LDOA1
    • Automatic Switch to External 5-V Buck for Higher Efficiency
  • Built-in Flexibility and Configurability by OTP Programming
    • Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
    • Four GPO Pins Configurable to Power Good of Any Selected Rails
    • Open-Drain Interrupt Output Pin
  • I2C Interface Supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz)
  • Two Banks of One-Time Programmable Memory for Programming Default Voltages and Sequence
  • Wide VIN Range From 5.6 V to 21 V
  • Three Variable-Output Voltage Synchronous
    Step-Down Controllers With D-CAP2™ Topology
    • Scalable Output Current Using External FETs With Selectable Current Limit
    • I2C DVS Control From 0.41 V to 1.67 V in
      10-mV Steps or 1 V to 3.575 V in 25-mV Steps or Fixed 5 V Output
  • Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology
    • VIN Range From 3 V to 5.5 V
    • Up to 3 A of Output Current
    • I2C DVS Control From 0.425 V to 3.575 V in 25-mV Steps
  • Three LDO Regulators With Adjustable Output Voltage
    • LDOA1: I2C-Selectable Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2 and LDOA3: I2C-Selectable Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current Each
  • VTT LDO for DDR Memory Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • 5-V Fixed-Output Voltage LDO (LDO5)
    • Power Supply for Gate Drivers of SMPS and for LDOA1
    • Automatic Switch to External 5-V Buck for Higher Efficiency
  • Built-in Flexibility and Configurability by OTP Programming
    • Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
    • Four GPO Pins Configurable to Power Good of Any Selected Rails
    • Open-Drain Interrupt Output Pin
  • I2C Interface Supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz)

The TPS650861 device family is a single-chip power-management IC (PMIC) designed to be programmed for optimal output voltages and sequencing. The TPS650861 has three controllers to provide flexible power capable of up to 30A with large external FETs for high power designs but which can scale down in both size and cost for smaller designs. Combined with three 3 A converters, three general purpose LDOs, a termination LDO for DDR, and three load switches, the TPS650861 can provide system power for a wide variety of applications. The D-CAP2™ and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. The device has two banks of one-time programmable (OTP) memory. For large volume opportunities, please contact a local TI sales representative to determine if use of TI’s manufacturing for a custom OTP is available. Third party distributors may also support programming of the TPS650861.

The TPS650861 device family is a single-chip power-management IC (PMIC) designed to be programmed for optimal output voltages and sequencing. The TPS650861 has three controllers to provide flexible power capable of up to 30A with large external FETs for high power designs but which can scale down in both size and cost for smaller designs. Combined with three 3 A converters, three general purpose LDOs, a termination LDO for DDR, and three load switches, the TPS650861 can provide system power for a wide variety of applications. The D-CAP2™ and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. The device has two banks of one-time programmable (OTP) memory. For large volume opportunities, please contact a local TI sales representative to determine if use of TI’s manufacturing for a custom OTP is available. Third party distributors may also support programming of the TPS650861.

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Technical documentation

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Type Title Date
* Data sheet TPS650861 Programmable Multirail PMU for Multicore Processors, FPGAs, and Systems datasheet 25 Jul 2018
Technical article 3 quiescent-current (Iq) specifications you need to understand 12 Nov 2021
Application note Using TPS65086x PMIC to Power Xilinx Zynq UltraScale+ MPSoCs 28 Oct 2021
Application note TPS65086100 OTP Generator (Rev. D) 08 Apr 2019
User guide TPS65086100 User's Guide for NXP LS1043 (Rev. B) 12 Feb 2019
User guide BOOSTXL-TPS650861 EVM User’s Guide 15 Aug 2018
Technical article How PMICs can help streamline FPGA power design challenges 23 Jun 2018
User guide TPS65086100 Non-Volatile Memory Programming Guide 15 Aug 2017
Application note TPS65086x Schematic and Layout Checklist (Rev. A) 02 Dec 2015
User guide TPS65086x Design Guide 19 Nov 2015
User guide TPS65086x Evaluation Module User's Guide 19 Nov 2015
White paper Power management integrated buck controllers for distant point-of-load apps 14 Aug 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

BOOSTXL-TPS650861 — TPS650861 Customer Programming BoosterPack

The TPS650861 customer programming BoosterPack uses an MSP430F5529 Launchpad to enable customer programming of the non-volatile memory of the TPS65086100 Power management IC (PMIC). The BOOSTXL-TPS650861 features a socket for programming units before soldering down on TPS650860EVM-116 or customer (...)

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Evaluation board

TPS650860EVM-116 — TPS650860 Evaluation Module

Evaluation Module (EVM) for the TPS65086x family. The EVM provides a platform for engineers to evaluate, test, and explore the TPS650860 in a real world application use. All of the sequencing and functionality required for the processor and system is demonstrated on this board. This EVM also (...)

In stock
Limit: 1
Driver or library

TPS65086SW-LINUX — Linux Driver for TPS65086

The Linux driver supports the TPS65086 Power Management IC. The Linux driver supports communication through the I2C bus and interfaces with the Regulator sub-system.

 

Linux Mainline Status

Available in Linux Main line: Yes
Available through git.ti.com: N/A

Supported Devices:

  • tps65086

 

Linux Source Files

(...)

Firmware

PMIC USB2ANY Launchpad Firmware

SWCC021.ZIP (4322 KB)
GUI for evaluation module (EVM)

IPG-UI — IPG-UI EVM GUI

The IPG-UI GUI can be used to configure multiple PMIC devices to evaluate the features and performance of those devices.  This GUI is build using web based technologies and supports interacting with the EVM hardware using a USB2ANY adapter board. The USB2ANY Explorer is provided to allow (...)
GUI for evaluation module (EVM)

IPG-UI EVM GUI (Windows Installer) (Rev. H)

SLVC620H.ZIP (61428 KB)
GUI for evaluation module (EVM)

USB2ANY Explorer Installer v2.7.0.0

SLVC622.ZIP (5928 KB)
GUI for evaluation module (EVM)

IPG-UI EVM GUI (Linux Installer) (Rev. G)

SLVC630G.ZIP (63230 KB)
GUI for evaluation module (EVM)

IPG-UI EVM GUI (OSX Installer) (Rev. G)

SLVC631G.ZIP (57791 KB)
GUI for evaluation module (EVM)

BOOSTXL-TPS650861 IPG-UI Device Support File (Rev. A)

SWCC019A.ZIP (21825 KB)
Simulation model

TPS650860 RSK IBIS Model

SWCM006.ZIP (37 KB) - IBIS Model
Simulation model

Flotherm Model for TPS65086x products

SWCM008.ZIP (0 KB) - Thermal Model
Calculation tool

TPS65086100 OTP Generator for LS1043A (Rev. C)

SWCC022C.ZIP (886 KB)
Calculation tool

TPS65086100 OTP Generator (TPS650860 settings)

SWCC023.ZIP (891 KB)
Calculation tool

TPS650861 Programming PMP22165

TIDCFV1.ZIP (921 KB)
Gerber file

TPS65086x Hardware Files

SLVC642.ZIP (5018 KB)
Reference designs

PMP22165 — Power for Xilinx Versal adaptive compute acceleration platform (ACAP) reference design

This reference design addresses Xilinx Versal adaptive compute acceleration platform (ACAP) requirements and consists of a power management integrated circuit (PMIC) for system rails plus a multiphase controller and power stages to support higher current processor loads.  On-board dynamic (...)
Reference designs

TIDA-01393 — Power reference design for Xilinx® Zynq® UltraScale+™ MPSoC applications

This reference design is a configurable power solution designed to handle the entire Xilinx® Zynq® UltraScale+ (ZU+) family of MPSoC devices across various use cases.

The various versions of the TPS65086x PMIC allow this design to power devices from the basic ZU2CG device with a dual-core Arm® (...)

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VQFN (RSK) 64 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
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  • Qualification summary
  • Ongoing reliability monitoring

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