700–2700 MHz Dual-Channel Receiver with 16-Bit ADC and 100 MHz IF Bandwidth Reference Design


Design files


The increasing demand on wireless networks to provide faster data links to customers has driven transceiver hardware to increasingly demanding performance with enough bandwidth to support the largest standardized multi-carrier frequency bands (with band aggregation in some cases) and enough receiver sensitivity and dynamic range to function in the presence of the strong blocking signals common in busy environments. This reference design describes a radio frequency (RF) receiver reference design with 16-bit sampler that achieves more than 100 MHz of bandwidth including a down-converting mixer, digital variable gain amplifier (DVGA), high speed pipelined analog-to-digital converter (ADC), local oscillator (LO) RF synthesizer and jitter-cleaning clock generator.

  • Implements a RF Super-Heterodyne Receiver Subsystem with 700–2700-MHz Input Range, Wide 100-MHz IF Bandwidth and 16-Bit ADC
  • Accelerate the Design Time of a Wireless Communications, Software Defined Radio, Military, or Test and Measurement Application With a Proven IF Signal Chain
  • Evaluate this Reference Design Effortlessly With Supported Data Capture and Analysis Tools
  • This Reference Design is Tested and Includes an Evaluation Module (EVM), Configuration Software, and User’s Guide
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDU767.PDF (2077 K)

Reference design overview and verified performance test data


Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers


Detailed overview of design layout for component placement


Detailed overview of design layout for component placement

TIDRDI3.ZIP (1758 K)

Files used for 3D models or 2D drawings of IC components

TIDC977.ZIP (2383 K)

Design file that contains information on physical board layer of design PCB

TIDRDI2.PDF (1521 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

High-speed ADCs (≥10 MSPS)

ADC16DX370Dual-Channel, 16-Bit, 370-MSPS Analog-to-Digital Converter (ADC)

Data sheet: PDF | HTML
AC/DC & DC/DC converters (integrated FET)

TPS62130A3-V to 17-V, 3-A step-down converter with DCS-control in 3x3 QFN package

Data sheet: PDF | HTML
Clock jitter cleaners

LMK04828Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML
Downconverting mixers

TRF37B32700M-2700MHz dual Down Converter Mixer with Integrated IF Amp & RF Baluns

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

LP3878-ADJ800-mA, 16-V, adjustable low-dropout voltage regulator with enable

Data sheet: PDF | HTML
RF PLLs & synthesizers

LMX25813.76-GHz wideband frequency synthesizer with integrated VCO

Data sheet: PDF | HTML

LMH6521High Performance Dual DVGA

Data sheet: PDF | HTML
eFuses & hot swap controllers

TPS24005.5-V over voltage protection controller with 100-V input transient protection

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
Technical article How to select a power-efficient narrowband receiver for active antenna-array syste PDF | HTML Apr. 12, 2016
User guide TIDA-00360 Performance Summary Mar. 17, 2015
Design guide 700–2700-MHz Dual-Channel Receiver With 16-Bit ADC and 100 MHz of IF Bandwidth Feb. 06, 2015

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