LP3878-ADJ

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800-mA, 16-V, adjustable low-dropout voltage regulator with enable

LP3878-ADJ is in the process of being discontinued
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TLV767 ACTIVE Adjustable- and fixed-output, 1-A, 16-V, positive-voltage low-dropout (LDO) linear regulator Replacement device with improved accuracy, PSRR and 5uA quiescent current.

Product details

Output options Adjustable Output Iout (max) (A) 0.8 Vin (max) (V) 16 Vin (min) (V) 2.5 Vout (max) (V) 5.5 Vout (min) (V) 1 Noise (µVrms) 18 Iq (typ) (mA) 5.5 Thermal resistance θJA (°C/W) 43 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 35 Dropout voltage (Vdo) (typ) (mV) 475 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 0.8 Vin (max) (V) 16 Vin (min) (V) 2.5 Vout (max) (V) 5.5 Vout (min) (V) 1 Noise (µVrms) 18 Iq (typ) (mA) 5.5 Thermal resistance θJA (°C/W) 43 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 35 Dropout voltage (Vdo) (typ) (mV) 475 Operating temperature range (°C) -40 to 125
HSOIC (DDA) 8 29.4 mm² 4.9 x 6 WSON (NGT) 8 16 mm² 4 x 4
  • Input Supply Voltage: 2.5 V to 16V
  • Output Voltage Range: 1 V to 5.5 V
  • Designed for Use With Low-ESR Ceramic
    Capacitors
  • Very Low Output Noise
  • 8-Lead SO PowerPAD and WSON Surface-
    Mount Packages
  • < 10-µA Quiescent Current in Shutdown
  • Low Ground Pin Current at all Loads
  • Overtemperature and Overcurrent Protection
  • –40°C to 125°C Operating Junction Temperature
    Range
  • Input Supply Voltage: 2.5 V to 16V
  • Output Voltage Range: 1 V to 5.5 V
  • Designed for Use With Low-ESR Ceramic
    Capacitors
  • Very Low Output Noise
  • 8-Lead SO PowerPAD and WSON Surface-
    Mount Packages
  • < 10-µA Quiescent Current in Shutdown
  • Low Ground Pin Current at all Loads
  • Overtemperature and Overcurrent Protection
  • –40°C to 125°C Operating Junction Temperature
    Range

The LP3878-ADJ is an 800-mA, adjustable output, voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1 V.

Using an optimized VIP (Vertically Integrated PNP) process, the LP3878-ADJ delivers superior performance:

  • Ground Pin Current: Typically 5.5 mA at 800-mA load, and 180 µA at 100-µA load.
  • Low Power Shutdown: The LP3878-ADJ draws less than 10-µA quiescent current when the SHUTDOWN pin is pulled low.
  • Precision Output: Ensured output voltage accuracy is 1% at room temperature.
  • Low Noise: Broadband output noise is only 18 µV (typical) with a 10-nF bypass capacitor.

The LP3878-ADJ is an 800-mA, adjustable output, voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1 V.

Using an optimized VIP (Vertically Integrated PNP) process, the LP3878-ADJ delivers superior performance:

  • Ground Pin Current: Typically 5.5 mA at 800-mA load, and 180 µA at 100-µA load.
  • Low Power Shutdown: The LP3878-ADJ draws less than 10-µA quiescent current when the SHUTDOWN pin is pulled low.
  • Precision Output: Ensured output voltage accuracy is 1% at room temperature.
  • Low Noise: Broadband output noise is only 18 µV (typical) with a 10-nF bypass capacitor.

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Technical documentation

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Type Title Date
* Data sheet LP3878-ADJ Micropower 800-mA Low-Noise "Ceramic Stable" Adjustable Voltage Regulator for 1-V to 5-V Applications datasheet (Rev. D) PDF | HTML 09 Feb 2015
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Technical article How LDOs contribute to power efficiency PDF | HTML 13 May 2016
User guide AN-1409 LP3878-ADJ Evaluation Board (Rev. D) 02 Jun 2013
Application note AN-2145 Power Considerations for SDI Products (Rev. B) 26 Apr 2013
Application note AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 26 Apr 2013
Application note AN-1950 Silently Powering Low Noise Applications (Rev. A) 22 Apr 2013
User guide High-IF Sub-sampling Receiver Subsystem User Guide 27 Jan 2012
User guide SP16130CH4RB Low IF Receiver Reference Design User Guide 27 Jan 2012
White paper Using Power to Improve Signal-Path Performance 01 Aug 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

LP3878-ADJ PSpice Transient Model (Rev. A)

SNVMBD2A.ZIP (669 KB) - PSpice Model
Simulation model

LP3878-ADJ Unencrypted PSpice Transient Model (Rev. A)

SNVMBD1A.ZIP (2 KB) - PSpice Model
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Package Pins Download
HSOIC (DDA) 8 View options
WSON (NGT) 8 View options

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