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Three-Phase Inverter Reference Design Using Gate Driver With Built-in Dead Time Insertion
TIDA-01540
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
See the Important Notice and Disclaimer covering reference designs and other TI resources.
Key Document
- 3-Phase Inverter Ref Design Using Gate Driver With Built-in Dead Time Insertion
(PDF 781 KB)
06 Dec 2017
Description
The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages for the gate drive power supply. The dual gate driver UCC21520 has a built-in dead time insertion configurable by a resistor option. The unique dead time insertion protects the three phase inverter against shoot-through due to overlap of the input PWM signal. System reliability is improved by implementing protection against overload, short circuit, ground fault, DC bus undervoltage and overvoltage, and IGBT module overtemperature in hardware.
Features
- Reinforced, isolated inverter suited for 200-V to 690-V AC drives rated up to 10 kW
- Reinforced, isolated, half-bridge gate driver have excellent propagation delay matching to enable smaller dead time (lower distortions and lower power losses)
- Integrated interlock, dead time, and insertion protects IGBT when PWM input signals overlap (programmable dead time)
- STO and fail-safe measure against primary-side logic failures, is more reliable with a disable signal that simultaneously shuts down both high and low-side gate drive outputs to IGBTs
- UCC21520 has high CMTI (100 kV/µs) for high robustness against switching transients
- UCC21520 rejects input pulses and noise transients shorter than 5 ns to avoid false turnon or turnoff of IGBTs
See the Important Notice and Disclaimer covering reference designs and other TI resources.
