Three-Phase Inverter Reference Design Using Gate Driver With Built-in Dead Time Insertion


Design files


The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages for the gate drive power supply. The dual gate driver UCC21520 has a built-in dead time insertion configurable by a resistor option. The unique dead time insertion protects the three phase inverter against shoot-through due to overlap of the input PWM signal. System reliability is improved by implementing protection against overload, short circuit, ground fault, DC bus undervoltage and overvoltage, and IGBT module overtemperature in hardware.

  • Reinforced, isolated inverter suited for 200-V to 690-V AC drives rated up to 10 kW
  • Reinforced, isolated, half-bridge gate driver have excellent propagation delay matching to enable smaller dead time (lower distortions and lower power losses)
  • Integrated interlock, dead time, and insertion protects IGBT when PWM input signals overlap (programmable dead time)
  • STO and fail-safe measure against primary-side logic failures, is more reliable with a disable signal that simultaneously shuts down both high and low-side gate drive outputs to IGBTs
  • UCC21520 has high CMTI (100 kV/µs) for high robustness against switching transients
  • UCC21520 rejects input pulses and noise transients shorter than 5 ns to avoid false turnon or turnoff of IGBTs
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.


Reference design overview and verified performance test data

TIDRU26A.PDF (590 K)

Detailed schematic diagram for design layout and components

TIDRU27.PDF (98 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRU28.PDF (538 K)

Detailed overview of design layout for component placement

TIDRU30A.ZIP (4705 K)

Files used for 3D models or 2D drawings of IC components

TIDCE53.ZIP (440 K)

Design file that contains information on physical board layer of design PCB

TIDRU29.PDF (3057 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.


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Isolated amplifiers

AMC1301±250 mV-Input Precision Reinforced Isolated Amplifier for Current Sensing

Data sheet: PDF | HTML
Isolated amplifiers

AMC13112-V input, precision voltage sensing reinforced isolated amplifier

Data sheet: PDF | HTML
Isolated gate drivers

UCC215205.7kVrms, 4A/6A dual-channel isolated gate driver w/ dual input, disable pin, 8V UVLO in DW package

Data sheet: PDF | HTML
Isolated gate drivers

UCC215405.7kVrms 4A/6A dual-channel isolated gate driver with dual inputs, DT pin & 8V UVLO in DW or DWK pkg

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TLV1117800-mA, 15-V, linear voltage regulator

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TLV704150-mA 24-V ultra-low-IQ low-dropout (LDO) voltage regulator

Data sheet: PDF | HTML
NAND gates

SN74LVC1G10Single 3-input, 1.65-V to 5.5-V NAND gate

Data sheet: PDF
Precision op amps (Vos<1mV)

OPA320Precision, zero-crossover, 20-MHz, 0.9-pA Ib, RRIO, CMOS operational amplifier

Data sheet: PDF | HTML
Series voltage references

REF20333.3-V Vref, low-drift, low-power, dual-output Vref & Vref/2 voltage reference

Data sheet: PDF | HTML
Shunt voltage references

TL431Adjustable precision shunt regulator

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide 3-Phase Inverter Ref Design Using Gate Driver With Built-in Dead Time Insertion Dec. 06, 2017
Application note Designing With the Improved TL431LI (Rev. A) Jun. 28, 2019

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