4-A/6-A, 5.7-kVRMS dual-channel isolated gate driver with 8-V UVLO, dual input
Product details
Parameters
Package | Pins | Size
Features
- Wide body package options
- DW SOIC-16: pin-2-pin to UCC21520
- DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
- Up to 4-A peak source and 6-A peak sink output
- Up to 18-V VDD output drive supply
- 5-V and 8-V VDD UVLO Options
- CMTI greater than 100 V/ns
- Switching parameters:
- 40-ns maximum propagation delay
- 5-ns maximum delay matching
- 5.5-ns maximum pulse-width distortion
- 35-µs maximum VDD power-up delay
- Resistor-programmable dead time
- TTL and CMOS compatible inputs
- Safety-related certifications:
- 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
- 5700-VRMS isolation for 1 minute per UL 1577
- CQC certification per GB4943.1-2011
All trademarks are the property of their respective owners.
Description
The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.
The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).
Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- High-performance isolated driver with input and output interface
- Ability to test low-voltage datasheet parameters
- Ability to compare performance of various drivers with compatible pinout
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download TIDA-010062 Assembly Drawing.pdf (490KB) -
download TIDA-010062 PCB.pdf (1064KB) -
download TIDA-010062 CAD Files.zip (23805KB) -
download TIDA-010062 Gerber.zip (385KB) -
download TIDA-010062 BOM Files (Rev. A).zip (355KB)
Design files
-
download Vienna Rectifier-Based Three Phase Power Factor Correction Assembly Drawing (Rev. A).pdf (663KB) -
download Vienna Rectifier-Based Three Phase Power Factor Correction Using C2000™ MCUs BOM (Rev. A).pdf (114KB) -
download Vienna Rectifier-Based Three Phase Power Factor Correction CAD Files (Rev. A).zip (4380KB) -
download Vienna Rectifier-Based Three Phase Power Factor Correction Gerber (Rev. A).zip (2578KB) -
download Vienna Rectifier-Based Three Phase Power Factor Correction Using C2000™ MCUs PCB (Rev. A).pdf (3956KB)
Design files
-
download TIDA-00366 Assembly Drawing (Rev. B).pdf (906KB) -
download TIDA-00366 BOM (Rev. B).pdf (105KB) -
download TIDA-00366 Altium (Rev. B).zip (2891KB) -
download TIDA-00366 Gerber (Rev. B).zip (586KB) -
download TIDA-00366 PCB (Rev. B).pdf (3165KB)
Design files
-
download PMP40500 BOM.pdf (35KB) -
download PMP40500 Assembly Drawing.pdf (236KB) -
download PMP40500 PCB.pdf (1760KB) -
download PMP40500 CAD Files.zip (26KB) -
download PMP40500 Gerber.zip (609KB)
Design files
-
download TIDA-01540 BOM.pdf (98KB) -
download TIDA-01540 Assembly Drawing.pdf (538KB) -
download TIDA-01540 PCB.pdf (3057KB) -
download TIDA-01540 Gerber.zip (440KB) -
download TIDA-01540 CAD Files (Rev. A).zip (4705KB)
Design files
-
download TIDA-01541 BOM.pdf (98KB) -
download TIDA-01541 Assembly Drawing.pdf (538KB) -
download TIDA-01541 PCB.pdf (3057KB) -
download TIDA-01541 Gerber.zip (439KB) -
download TIDA-01541 CAD Files (Rev. A).zip (5143KB)
Design files
-
download TIDA-00951 Assembly Drawing.pdf (226KB) -
download TIDA-00951 PCB.pdf (1699KB) -
download TIDA-00951 CAD Files.zip (6563KB) -
download TIDA-00951 Gerber.zip (1995KB) -
download TIDA-00951 BOM (Rev. A).pdf (114KB)
Design files
-
download TIDA-01159 BOM.pdf (116KB) -
download TIDA-01159 Assembly Drawing.pdf (66KB) -
download TIDA-01159 PCB.pdf (310KB) -
download TIDA-01159 CAD Files.zip (1760KB) -
download TIDA-01159 Gerber.zip (525KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (DW) | 16 | View options |
SOIC (DWK) | 14 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.