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UCC21540

ACTIVE

5.7kVrms 4A/6A dual-channel isolated gate driver with dual inputs, DT pin & 8V UVLO in DW or DWK pkg

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Data sheet

UCC21540

ACTIVE
Data sheet Order now

Product details

Number of channels 2 Withstand isolation voltage (VISO) (Vrms) 5700 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input VCC (min) (V) 3 Input VCC (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bus voltage (max) (V) 1414 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
Number of channels 2 Withstand isolation voltage (VISO) (Vrms) 5700 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input VCC (min) (V) 3 Input VCC (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bus voltage (max) (V) 1414 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWK) 14 106.09 mm² 10.3 x 10.3
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4-A peak source and 6-A peak sink output
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • CMTI greater than 100 V/ns
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
    • 5700-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4-A peak source and 6-A peak sink output
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • CMTI greater than 100 V/ns
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
    • 5700-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011

The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.

The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.

The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.

The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
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UCC21542 ACTIVE 5.7kVrms,4A/6A dual-channel isolated gate driver w/ 8V UVLO, 3.3mm channel to channel spacing option Non-Programmable deadtime version

Technical documentation

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Type Title Date
* Data sheet UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3-mm Channel-to-Channel Spacing Option datasheet (Rev. D) PDF | HTML 04 Jan 2021
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. R) 12 Jul 2022
More literature Addressing high-voltage design challenges with reliable and affordable isolation (Rev. A) PDF | HTML 06 Jun 2022
More literature 以可靠且經濟實惠的隔離技術解決高電壓設計難題 (Rev. A) PDF | HTML 06 Jun 2022
More literature 높 은 신뢰도와 합리적인 가격대의 절연 기술 개발과 관련한 고전압 설계 문 제의 해결.. (Rev. A) PDF | HTML 06 Jun 2022
More literature The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dec 2021
Certificate FPPT2 - Nonoptical Isolating Devices UL 1577 Certificate of Compliance 26 Oct 2021
Certificate CQC19001226951 05 Feb 2021
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 24 Apr 2020
More literature External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
More literature Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 22 Jul 2019
User guide Gate Drive Voltage vs. Efficiency 25 Apr 2019
More literature Impact of an isolated gate driver (Rev. A) 20 Feb 2019
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
EVM User's guide Using the UCC21540EVM 27 Jul 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
More literature Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 May 2018
More literature Understanding failure modes in isolators (Rev. A) 10 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
More literature Cities grow smarter through innovative semiconductor technologies 07 Jul 2017
More literature UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 05 Jul 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC21540EVM — 5.0-kVrms Isolated Dual-Channel Gate Driver With 3.3mm Channel-to-Channel Spacing Evaluation Module

UCC21540EVM is designed for evaluating UCC21540, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM serves as a reference design for driving power MOSFETs with up to 18V drive voltage, UCC21540 pin function identification, components (...)
User guide: PDF
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Simulation model

UCC21540 PSpice Transient Model

SLUM656.ZIP (19 KB) - PSpice Model
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Reference designs

TIDM-1000 — Vienna Rectifier-Based Three Phase Power Factor Correction Reference Design Using C2000 MCU

Vienna rectifier power topology is used in high power three phase power factor (AC-DC) applications such as off board EV chargers and telecom rectifiers. Control design of the rectifier can be complex. This design illustrates a method to control the power stage using C2000™ microcontrollers (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-010062 — 1-kW, 80 plus titanium, GaN CCM totem pole bridgeless PFC and GaN half-bridge LLC reference design

This reference design is a digitally controlled, compact 1-kW AC/DC power supply design for server power supply unit (PSU) and telecom rectifier applications. This highly efficient design supports two main power stages, including a front-end continuous conduction mode (CCM) totem-pole bridgeless (...)
Design guide: PDF
Schematic: PDF
Reference designs

PMP41043 — 1.6-kW reference design with CCM totem pole PFC and current-mode LLC realized by C2000 and GaN

This reference design demonstrates a hybrid hysteresis control (HHC) method, a current mode control method on half-bridge LLC stage with a C2000 F28004x microcontroller. The hardware is based on TIDA-010062 which is 1-kW, 80 Plus titanium, GaN CCM totem pole bridgeless PFC and half-bridge LLC (...)
Test report: PDF
Reference designs

PMP41006 — 1-kW reference design with CCM totem pole PFC and current-mode LLC realized by C2000™ and GaN

This reference design demonstrates a hybrid hysteresis control (HHC) method, a kind of current-mode control method on half-bridge LLC stage with a C2000™ F28004x microcontroller. The hardware is based on TIDA-010062, which is 1-kW, 80-Plus titanium, GaN CCM totem pole bridgeless PFC and half-bridge (...)
Test report: PDF
Reference designs

TIDA-00951 — 2kW, 48V to 400V, >93% Efficiency, Isolated Bidirectional DC-DC Converter Reference Design for UPS

The 2-kW isolated bidirectional DC-DC converter reference design (TIDA-00951) is capable of power transfer between a 400-V DC-BUS and a 12-14 cell lithium battery pack for use in UPS, battery backup and power storage applications. This reference design works as active clamped boost converter with (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00366 — Reference design for reinforced isolation 3-phase inverter with current, voltage and temp protection

This reference design provides a three-phase inverter rated up to 10 kW designed using the reinforced isolated gate driver UCC21530, reinforced isolated amplifiers AMC1301 and AMC1311 and MCU TMS320F28027. Lower system cost is achieved by using the AMC1301 to measure motor current interfaced with (...)
Design guide: PDF
Schematic: PDF
Reference designs

PMP40500 — 54-VDC input, 12-V 42-A output half-bridge reference design

This 12-V, 42-A output half-bridge reference design is for bus converters in wired networking campus and branch switches. The design features high efficiency and various fault protections (over-current and short-circuit). The design provides an efficiency comparison using 3 kVRMS basic and (...)
Test report: PDF
Schematic: PDF
Reference designs

TIDA-01540 — Three-Phase Inverter Reference Design Using Gate Driver With Built-in Dead Time Insertion

The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01541 — High-Bandwidth Phase Current and DC-Link Voltage Sensing Reference Design for Three-Phase Inverters

The TIDA-01541 reference design reduces system cost and enables a compact design for isolated phase current and DC link voltage measurement in three-phase inverters, while achieving high bandwidth and sensing accuracy. The output of the isolated amplifiers is interfaced to the internal ADC of the (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01159 — Compact, Half-Bridge, Reinforced Isolated Gate Drive Reference Design

This reference design is a half-bridge isolated gated driver used in driving power stages of UPS, inverters, server and telecom applications. This reference design is based on the UCC21520 reinforced insulated gate driver and is capable of driving MOSFETs and SiC-FETs. The design (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
SOIC (DW) 16 View options
SOIC (DWK) 14 View options

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