ADC34J23EVM
ADC34J23 四通道、12 位元、80 MSPS 類比轉數位轉換器評估模組
ADC34J23EVM
概覽
The ADC34J23 evaluation module demonstrates the performance of a low power quad 80Msps 12 bit ADC. It includes the ADC34J23 device, LMK04828 to provide JESD204B clocking and TI voltage regulators to provide the necessary voltages. The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. An onboard LMK04828 can be used to generate the necessary JESD204B clocks. Register access is provided through the on board USB connection and a GUI.
特點
- Single 1.8V supply to simplify power requirements
- Flexible input clock buffer with 1/2/4 divider to simplify clocking
- On chip dither to improve SFDR
- JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
- Supports subclasses 0,1,2 for synchronization and compatibility
高速 ADC (≥10 MSPS)
訂購並開始開發
開發板
ADC34J23EVM — ADC34J23 Evaluation Module
ADC34J23EVM — ADC34J23 Evaluation Module
開發模組 (EVM) 的 GUI
SLAC667 — ADC3xxx GUI Installer
支援產品和硬體
產品
高速 ADC (≥10 MSPS)
硬體開發
開發板
SLAC667 — ADC3xxx GUI Installer
產品
高速 ADC (≥10 MSPS)
硬體開發
開發板
版本資訊
The design resource accessed as www.ti.com/lit/zip/slac667 or www.ti.com/lit/xx/slac667d/slac667d.zip has been migrated to a new user experience at www.ti.com/tool/download/SLAC667. Please update any bookmarks accordingly.
設計檔案
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檢視所有 2
| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | EVM User's guide | ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) | 2018/8/24 | |||
| 證書 | ADC34J23EVM EU Declaration of Conformity (DoC) | 2019/1/2 |