開發模組 (EVM) 的 GUI
ADC3444
- Quad Channel
- 14-Bit Resolution
- Single Supply: 1.8 V
- Serial LVDS Interface
- Flexible Input Clock Buffer With Divide-by-1, -2, -4
- SNR = 72.4 dBFS, SFDR = 87 dBc at
fIN = 70 MHz - Ultra-Low Power Consumption:
- 98 mW/Ch at 125 MSPS
- Channel Isolation: 105 dB
- Internal Dither and Chopper
- Support for Multi-Chip Synchronization
- Pin-to-Pin Compatible With 12-Bit Version
- Package: VQFN-56 (8 mm × 8 mm)
The ADC344x devices are a high-linearity, ultra-low power, quad-channel, 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization.
The ADC344x family supports serial low-voltage differential signaling (LVDS) to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. Optionally, a one-wire serial LVDS interface is available. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are transmitted as LVDS outputs.
技術文件
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檢視所有 6 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | ADC344x Quad-Channel, 14-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters datasheet (Rev. B) | PDF | HTML | 2017年 4月 17日 |
| EVM User's guide | ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) | 2018年 8月 24日 | ||
| White paper | Minimum Power Specifications for High-Performance ADC Power-Supply Designs | 2016年 3月 31日 | ||
| Technical article | Designing a power supply solution for pipeline ADCs – Part 2 | PDF | HTML | 2015年 9月 4日 | |
| Technical article | Designing a power supply solution for pipeline ADCs – Part 1 | PDF | HTML | 2015年 9月 3日 | |
| Technical article | How to filter out noise in your DC/DC design | PDF | HTML | 2015年 8月 18日 |
設計與開發
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開發板
ADC3444EVM — ADC3444 四通道、14 位元、125-MSPS 類比轉數位轉換器評估模組
ADC3444 EVM 展示了低功耗四路 125Msps 14 位元 ADC 的性能。其中包括 ADC3444 裝置及 TI 電壓穩壓器，以提供必要的電壓。ADC 的輸入連接至變壓器輸入，可連接至 50 ohm 單端訊號來源。時鐘輸入可透過變壓器輸入提供，並可連接至 50 ohm 單端時鐘來源。系統會提供 SYSREF 輸入，以允許完整的系統同步化。透過板載 USB 接頭和 GUI 提供暫存器存取權。對於完整的評估系統，TI 還提供 TSW1400 資料擷取卡和高速資料轉換器專業級軟體。
使用指南: PDF
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RTQ) | 56 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。