PMP8372
具有低雜訊 LDO 分裂軌 (±5V) 輸出電壓的 40V 雙路 1A 電源模組參考設計
PMP8372
概覽
The PMP8372 design is optimized for small size and uses the TPS84250 step-down power module on the top- side with the TPS84259 negative output power module on the bottom-side to implement both positive and negative output voltages from a 12V/24V source. The output voltages can be adjusted from +/-3V to +/-15V with resistor changes. The design is capable of 1-A outputs. The positive-input TPS7A4700 LDO and negative-input TPS7A3301 LDO are included for a low noise, high PSRR solution that is ideal for powering bipolar amplifiers, data converters, or other noise-sensitive analog circuitry.
特點
- Wide input Voltage range from 7V to 40V
- Dual output voltages can be adjusted from +/-3V to +/-15V, which are capable of 1A outputs
- High PSRR LDOs: Positive output 80dB PSRR @ 100Hz and Negative output 72dB PSRR @ 100KHz
- Positive output noise: 7μVrms (10Hz, 100kHz), Negative output noise: 30μVrms (10Hz, 100kHz)
- Ultra Low noise for powering bipolar amplifier, data converter, or other noise-sensitive analog circuitry
已開發完全組裝的電路板，僅供測試與性能驗證，且為非賣品。
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 測試報告 | PMP8372 Test Results | 2012/9/21 |