SNLS346C August   2011  – June 2014 DS90UR903Q-Q1 , DS90UR904Q-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Handling Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Recommended Serializer Timing for PCLK
    7. 6.7  Serial Control Bus AC Timing Specifications (SCL, SDA) - I2C Compliant (See )
    8. 6.8  Serial Control Bus DC Characteristics (SCL, SDA) - I2C Compliant
    9. 6.9  Serializer Switching Characteristics
    10. 6.10 Deserializer Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 Typical Application Diagram
      2. 7.2.2 Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Serial Frame Format
      2. 7.3.2 Signal Quality Enhancers
        1. 7.3.2.1 Des - Receiver Input Equalization (EQ)
      3. 7.3.3 Emi Reduction
        1. 7.3.3.1 Des - Receiver Staggered Output
        2. 7.3.3.2 Des Spread Spectrum Clocking
    4. 7.4 Device Functional Modes
      1. 7.4.1 LVCMOS VDDIO Option
      2. 7.4.2 Powerdown
      3. 7.4.3 Pixel Clock Edge Select (TRFB/RRFB)
    5. 7.5 Programming
      1. 7.5.1 Description of Serial Control Bus
      2. 7.5.2 ID[X] Address Decoder
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Typical Application Connection
        2. 8.2.2.2 AC Coupling
        3. 8.2.2.3 Power Up Requirements and PDB PIN
        4. 8.2.2.4 Transmission Media
        5. 8.2.2.5 Serial Interconnect Guidelines
        6. 8.2.2.6 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

These devices are designed to operate from an input core voltage supply of 1.8V. Some devices provide separate power and ground Terminals for different portions of the circuit. This is done to isolate switching noise effects between different sections of the circuit. Separate planes on the PCB are typically not required. Terminal Description tables typically provide guidance on which circuit blocks are connected to which power Terminal pairs. In some cases, an external filter may be used to provide clean power to sensitive circuits such as PLLs.