SNVSC74 September   2023 LP5813

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
  9. Typical Characteristics
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Synchronous Boost Converter
        1. 9.3.1.1 Undervoltage Lockout
        2. 9.3.1.2 Enable and Soft Start
        3. 9.3.1.3 Switching Frequency
        4. 9.3.1.4 Current Limit Operation
        5. 9.3.1.5 Boost PWM Mode
        6. 9.3.1.6 Boost PFM Mode
        7. 9.3.1.7 Pass-Through Mode
      2. 9.3.2 Time-cross-multiplexing (TCM) scheme
        1. 9.3.2.1 Direct drive mode
        2. 9.3.2.2 TCM drive mode
        3. 9.3.2.3 Mix drive mode
        4. 9.3.2.4 Ghosting elimination
      3. 9.3.3 Analog Dimming
      4. 9.3.4 PWM Dimming
      5. 9.3.5 Autonomous Animation Engine Control
        1. 9.3.5.1 Animation Engine Pattern
        2. 9.3.5.2 Sloper
        3. 9.3.5.3 Animation Engine Unit (AEU)
        4. 9.3.5.4 Animation Pause Unit (APU)
      6. 9.3.6 Protections and Diagnostics
        1. 9.3.6.1 Overvoltage Protection
        2. 9.3.6.2 Output Short-to-Ground Protection
        3. 9.3.6.3 LED Open Detections
        4. 9.3.6.4 LED Short Detections
        5. 9.3.6.5 Thermal Shutdown
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
    6. 9.6 Register Map Table
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Application
      2. 10.2.2 Design Parameters
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1 Inductor Selection
        2. 10.2.3.2 Output Capacitor Selection
        3. 10.2.3.3 Input Capacitor Selection
        4. 10.2.3.4 Program Procedure
        5. 10.2.3.5 Programming Example
      4. 10.2.4 Application Performance Plots
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Ghosting elimination

The LP5813 integrates ghosting elimination circuits to avoid both upside and downside ghosting phenomenon. The ghosting elimination can be disabled by setting clamp_dis = 1h, which is default as 0 and enabling the function.

Voltage on the outputs is clamped during PWM off time in the rest of switching period, or during blank time period, which is set in 'clamp_sel' bit in Dev_Config12 register. Figure 9-12 and Figure 9-13 show the effect of different clamp selection.

A middle voltage Vmid between VOUT and VOUT - Vf is used to clamp the OUTx (x = 0, 1, 2, 3), where Vf is the forward voltage of LED. This scheme can achieve both pre-discharge for scan switch FET and pre-charge for current sinks, which eliminate up-side and down-side ghosting issues in time-multiplexing topology. Since the clamp voltage for scan switch FET and current sinks is the same value, the reverse voltage on LED during deghosting is avoided. There are 4 options for Vmid which is selected in 'vmid_sel' bits in Dev_Config12 register, which can be used for different forward voltage range of different type LEDs.

GUID-20220621-SS0I-NK9H-D5GH-VPDH1VTPST8M-low.svg Figure 9-12 Ghosting elimination waveform when clamp_sel = 1
GUID-20220621-SS0I-ZJTB-7QBT-QQFM5NJMCWPV-low.svg Figure 9-13 Ghosting elimination waveform when clamp_sel = 0