JAJSFF6B june   2018  – september 2020 DS90C189-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Typical Application Diagrams
  6. 5 Revision History
  7. 6 Pin Configuration and Functions
    1.     DS90C189 Pin Descriptions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended Input Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 AC Timing Diagrams
    9. 7.9 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 AEC-Q100 Qualified
      2. 8.3.2 ESD Protection
      3. 8.3.3 Operating Modes
      4. 8.3.4 LVDS Configurations
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration
      2. 8.4.2 Single Pixel Input / Single Pixel Output
      3. 8.4.3 Single Pixel Input / Dual Pixel Output
      4. 8.4.4 Pixel Clock Edge Select (RFB)
      5. 8.4.5 Power Management
      6. 8.4.6 Sleep Mode (PDB)
      7. 8.4.7 LVDS Outputs
      8. 8.4.8 LVCMOS Inputs
    5. 8.5 Programming
      1. 8.5.1 LVDS Interface / TFT Color Data Recommended Mapping
        1. 8.5.1.1 Color Mapping Information
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 LVDS Interconnect Guidelines
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
    2. 10.2 Power Supply Filtering
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.8 LVCMOS Inputs

The DS90C189-Q1 has one bank of 24 data inputs, one set of video control signal (HS, VS and DE) inputs and several device configuration LVCMOS pins. All LVCMOS input pins are designed for 1.8 V LVCMOS logic. All LVCMOS inputs, including clock, data and configuration pins, have an internal pull down resistor to set a default state. If any inputs are unused, they can be left as no connect (NC) or connected to ground.