JAJSA67I April   2004  – February 2019 LM2743

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Start Up and Soft-Start
      2. 8.3.2  Normal Operation
      3. 8.3.3  Tracking a Voltage Level
      4. 8.3.4  Tracking Voltage Slew Rate
      5. 8.3.5  Sequencing
      6. 8.3.6  SD Pin Impedance
      7. 8.3.7  MOSFET Gate Drivers
      8. 8.3.8  Power Good Signal
      9. 8.3.9  UVLO
      10. 8.3.10 Current Limit
      11. 8.3.11 Foldback Current Limit
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Synchronous Buck Converter Typical Application using LM2743
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Duty Cycle Calculation
          3. 9.2.1.2.3 Input Capacitor
          4. 9.2.1.2.4 Output Inductor
          5. 9.2.1.2.5 Output Capacitor
          6. 9.2.1.2.6 MOSFETs
          7. 9.2.1.2.7 Support Components
          8. 9.2.1.2.8 Control Loop Compensation
          9. 9.2.1.2.9 Efficiency Calculations
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Example Circuit 1
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Bill of Materials
      3. 9.2.3 Example Circuit 2
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Bill of Materials
      4. 9.2.4 Example Circuit 3
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Bill of Materials
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

Typical limits are for TJ = 25°C only, represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only; minimum and maximum limits apply over the junction temperature range of –40°C to 125°C. Unless otherwise specified, VCC = 3.3 V. Data sheet minimum and maximum specification limits are specified by design, test, or statistical analysis. (See (1))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VFB FB Pin Voltage VCC = 3 V to 6 V 0.588 0.6 0.612 V
VON UVLO Thresholds Rising
Falling		 2.76
2.42		 V
IQ_VCC Operating VCC Current VCC = 3.3 V, VSD = 3.3 V
Fsw = 600 kHz		 1 1.5 2.1 mA
VCC = 5V, VSD = 3.3 V
Fsw = 600 kHz		 1 1.7 2.1
Shutdown VCC Current VCC = 3.3 V, VSD = 0 V 110 185 µA
tPWGD1 PWGD Pin Response Time VFB Rising 6 µs
tPWGD2 PWGD Pin Response Time VFB Falling 6 µs
ISS-ON SS Pin Source Current VSS = 0 V 7 10 14 µA
ISS-OC SS Pin Sink Current During Over Current VSS = 2.5 V 90 µA
ISEN-TH ISEN Pin Source Current Trip Point 25 40 55 µA
ERROR AMPLIFIER
GBW Error Amplifier Unity Gain Bandwidth 9 MHz
G Error Amplifier DC Gain 106 dB
SR Error Amplifier Slew Rate 3.2 V/µs
IEAO EAO Pin Current Sourcing and Sinking Capability VEAO = 1.5, FB = 0.55 V
VEAO = 1.5, FB = 0.65 V		 2.6
9.2		 mA
VEA Error Amplifier Output Voltage Minimum 1 V
Maximum 2 V
GATE DRIVE
IQ-BOOT BOOT Pin Quiescent Current VBOOT = 12 V, VSD = 0 18 90 µA
RHG_UP High-Side MOSFET Driver Pull-Up ON resistance VBOOT = 5 V at 350 mA Sourcing 3 Ω
RHG_DN High-Side MOSFET Driver Pull-Down ON resistance HG = 5 V at 350 mA Sourcing 2 Ω
RLG_UP Low-Side MOSFET Driver Pull-Up ON resistance VBOOT = 5 V at 350 mA Sourcing 3 Ω
RLG_DN Low-Side MOSFET Driver Pull-Down ON resistance LG = 5 V at 350 mA Sourcing 2 Ω
OSCILLATOR
fSW PWM Frequency RFADJ = 702.1 kΩ 50 kHz
RFADJ = 98.74 kΩ 300
RFADJ = 45.74 kΩ 475 600 725
RFADJ = 24.91 kΩ 1000
D Max High-Side Duty Cycle fSW = 300 kHz
fSW = 600 kHz
fSW = 1 MHz		 80%
76%
73%
LOGIC INPUTS AND OUTPUTS
V STBY-IH Standby High Trip Point VFB = 0.575 V, VBOOT = 3.3 V, VSD Rising 1.1 V
V STBY-IL Standby Low Trip Point VFB = 0.575 V, VBOOT = 3.3 V, VSD Falling 0.232 V
V SD-IH SD Pin Logic High Trip Point VSD Rising 1.3 V
V SD-IL SD Pin Logic Low Trip Point VSD Falling 0.8 V
VPWGD-TH-LO PWGD Pin Trip Points FB Falling 0.408 0.434 0.457 V
VPWGD-TH-HI PWGD Pin Trip Points FB Rising 0.677 0.710 0.742 V
VPWGD-HYS PWGD Hysteresis FB Falling 60 mV
FB Rising 90
(1) The power MOSFETs can run on a separate 1-V to 16-V rail (Input voltage, VIN). Practical lower limit of VIN depends on selection of the external MOSFET.