JAJSO66A December   2023  – January 2024 TPS61289

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Bidirectional Operation Configuration
      2. 6.3.2 VCC Power Supply
      3. 6.3.3 VHIGH and VCC Undervoltage Lockout (UVLO)
      4. 6.3.4 Enable and Programmable EN/UVLO
      5. 6.3.5 Switching Frequency
      6. 6.3.6 Programmable Switching Peak and Valley Current Limit
      7. 6.3.7 External Clock Synchronization
      8. 6.3.8 VHIGH Overvoltage Protection
      9. 6.3.9 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Bootstrap Capacitor Selection
        2. 7.2.2.2 Inductor Selection
        3. 7.2.2.3 MOSFET Selection
        4. 7.2.2.4 VLOW/VHIGH Output Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
        1. 7.4.2.1 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

TJ = –40°C to 125°C, VLOW = 3.6V and VHIGH = 18V. Typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
VLOW VLOW voltage range 23 V
VVHIGH VHIGH voltage range 4.5 25 V
VHIGH_UVLO Under voltage lockout threshold VHIGH_UVLO rising 3.2 3.4 3.6 V
VHIGH_UVLO Under voltage lockout threshold VHIGH_UVLO  falling 2.9 3.1 3.3 V
VCC Internal regulator output IVCC = 15mA 5.1 V
VCC_UVLO VCC UVLO threshold VCC rising 2.3 V
VCC_UVLO VCC UVLO threshold VCC falling 2.15 V
VCC_HYS VCC UVLO hysteresis VCC hysteresis 0.15 V

ISD_VLOW
 		 Shutdown current into VLOW pin  IC disabled, VLOW = SW = 2.3V to 23V, TJ up to 85°C 1.5 6 µA
ISD_SW Shutdown current into SW pin IC disabled, VLOW = SW = 2.3V to 23V, TJ up to 85°C 0.2 4 µA
IFB_LKG Leakage current into FB pin 50 nA
LOGIC INTERFACE
VEN_H EN high-level voltage threshold VCC = 5.0V 1.15 V
VEN_L EN low-level voltage threshold VCC = 5.0V 0.4 V
VEN/UVLO_RISE UVLO rising threshold at the EN/UVLO VCC = 5.0V 1.20 1.23 1.27 V
IEN/UVLO Sourcing current at the EN/UVLO pin VEN/UVLO = 1.3V 4.4 5 5.6 µA
VMODE_H MODE high-level voltage threshold VCC = 5.0V 1.2 V
VMODE_L MODE low-level voltage threshold VCC = 5.0V 0.4 V
OUTPUT
VREF Reference voltage at the FB pin PWM mode 0.985 1 1.015 V
VHIGH_OVP VHIGH overvoltage protection threshold VHIGH OVP rising 26 27 28 V
VHIGH_OVP_HYS VHIGH OVP protection hysteresis 1 V
POWER SWITCH
RDS(on) High-side MOSFET on resistance VCC = 5.0V 8.5 mΩ

FSW		 FSW when VLOW > 1.7V VLOW = 3.6V 250 kHz
FSW when 0.5V < VLOW < 1.5V VLOW = 1.2V 100 kHz
FSW when VLOW < 0.5V VLOW = 0.3V 50 kHz
tOFF_min Minimum off time in boost mode 90 130 ns
tON_min Minimum on time in buck mode 90 130 ns
tDLH LS-GATE off  to HS-GATE on deadtime 35 ns
tDHL HS-GATE off to LS-GATE on deadtime 25 ns

ILIM
 		 High clamp valley current limit(boost mode) RILIM = 20kΩ 17 20 23 A
Low clamp valley current limit(boost mode) -3.3 A
High clamp peak current limit(buck mode) RILIM = 20kΩ 17 20 23 A
Low clamp peak current limit(buck mode) -1.5 A
SOFT START
tSS Soft start time of internal reference 8 ms
ERROR AMPLIFIER
ISINK COMP pin sink current VFB = VREF + 400mV, VCOMP = 1.5V 20 µA
ISOURCE COMP pin source current VFB = VREF - 400mV, VCOMP = 1.5V 20 µA
VCOMPH High clamp voltage at the COMP pin RILIM = 20kΩ , PWM mode 1.6 V
VCOMPL Low clamp voltage at the COMP pin 0.6 V
GEA Error amplifier transconductance VCC = 5.0V 180 µA/V
SYNCHRONOUS CLOCK
RSYNC Internal pull down resistor from SYNC pin 800 kΩ
VM/SYNC_H M/SYNC high-level voltage threshold 1.2 V
VM/SYNC_L M/SYNC low-level voltage threshold 0.4 V
TSYNC_MIN Minimum sync clock pulse width 50 ns
PROTECTION
TSD Thermal shutdown Junction temperature rising 160 °C
TSD_HYS Thermal shutdown hysteresis 20 °C