SBOA418 july   2023 OPA2197-Q1 , OPA392

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction: Open-Loop Output Impedance (RO)
  5. 2Overview: Closed-Loop Amplifier Stability
  6. 3Example, Calculate Optimal Isolation Resistance to Drive Large Load Capacitance
  7. 4RO, RISO, and Capacitive Load Drive
  8. 5Derive Equation for Optimal Isolation Resistance
  9. 6Summary
  10. 7References

Derive Equation for Optimal Isolation Resistance

To reduce errors while maintaining closed-loop stability, the optimal RISO resistance must be determined. The optimal isolation resistance is the smallest series resistance that produces an acceptable transient response when driving the capacitive load. While a phase margin of 45° is generally considered stable, this may not be sufficient for applications that demand low overshoot. In certain cases, it is typical for a phase margin of 60° to be considered optimally damped. If voltage error is of primary concern, a phase margin of 45° can be targeted as this allows the smallest isolation resistance to be used.

GUID-20230615-SS0I-GTHQ-9KCD-WLNGVKGCNGH8-low.svgFigure 5-1 Small-Signal Step Response and Phase Margin

The closure frequency (fcl) is the frequency in which the AOL and 1/β curves intersect. Selecting an RISO resistance that places fz1 exactly at the closure frequency, targets a phase margin between 50°-60°, and is a good tradeoff between voltage error and transient performance. In this case, the optimal RISO results in fz1 such that,

Equation 6. fz1= fcl

For a typical amplifier in a buffer configuration, the closure frequency is simply the gain bandwidth (fgbw) of the op amp. However, in the case of the loaded AOL curve in which fp2 causes an additional 20 dB decrease in AOL per decade, the closure frequency is always less than the gain bandwidth. The exact closure frequency must be determined to accurately select the optimal fz1 frequency.

GUID-20230615-SS0I-3WC7-ZTGK-KVBWS7G4P0QS-low.svgFigure 5-2 Amplifier Open-Loop Gain with Capacitive Loading

Figure 5-2 plots an amplifier’s loaded AOL curve in relation to the frequencies fp2 and fgbw. Looking at this bode plot geometrically reveals two triangles with known slopes and vertices that intercept at fcl. Assuming a second order system with consistent slopes of -20 dB/decade and -40 dB/decade, fcl is always located at the midpoint between fp2 and fgbw on the logarithmic axis. With a known load capacitance, and data sheet extracted values for RO and fgbw, the following equations can be used to solve for fcl.

Equation 7. log10(fcl) = log10(fp2)+log10(fgbw)2
Equation 8. fcl = 10log10(fp2fgbw)2
Equation 9. fcl = fp2fgbw

Setting fz1 equal to fcl, and considering the shift in fp2 due to RISO results in Equation 10.

Equation 10. fz1 = fp2*fgbw

Combining Equation 10 with Equation 5 produces Equation 11.

Equation 11. 12πRISOCLOAD = fgbw2π[RO+RISO]CLOAD

Simplification results in the following quadratic equation for RISO in standard form.

Equation 12. (2πCLOADfgbw)RISO2 - RISO + RO = 0

Using the quadratic formula to solve for RISO with the assumption that RISO must be positive results in the equation that was used to determine the optimal RISO in Section 3.

Equation 13. RISO = 1+1+(8πROCLOADfgbw)4πCLOADfgbw

Where,

  • fgbw is the gain bandwidth of the amplifier in Hz, as defined in the data sheet
  • RO is the amplifier’s open-loop output impedance in Ohms, as defined in the data sheet
  • CLOAD is the load capacitance in Farads

For an amplifier driving a large capacitive load, Equation 13 can be used to quickly derive the isolation resistance required to target 50°-60° of phase margin. Spice simulation tools such as TINA-TI must be used to verify the resultant phase margin, as this can vary considerable depending on the initial phase margin and other circuit conditions. TI Precision Labs online training videos show how to perform stability analysis for amplifier circuits in a variety of conditions.

Equation 13 is derived for amplifiers in a buffer configuration, but this equation can also be used for gain stages by adjusting the frequency term to account for the gain bandwidth, as in Equation 14.

Equation 14. RISO = 1+1+(8πROCLOADfgbwAV)4πCLOADfgbwAV

Where AV equals the non-inverting gain of the amplifier stage in V/V.

The feedback network in gain configurations can produce additional poles and zeros in the amplifier’s 1/Beta and loaded AOL curves that can contribute to instability. In these cases, further analysis is required and additional stabilization techniques such as feedback compensation can be implemented. Always use spice simulation tools such as TINA-TI to verify that the circuit is stable and operating properly.