SLVA275C january 2010 – may 2023 UCD9081
The UCD9081 enforces a maximum byte or transaction timeout period of approximately 5 ms on the I2C master. This time is measured from the previous bytes falling SDA (during START, or repeated START) to the current bytes falling SDA (during START, or repeated START). See Figure 5-7. This timeout is not enforced for the cases when the UCD9081 holds SCL low (see Section 5.2.2) to insert additional wait states (that is, the byte timer is reset and does not expire during the stretch period).
Additionally, the byte timeout period is reset when a new bit (rising edge of SCL) arrives. So, excluding the four exceptions described in Section 5.2.3, the byte timeout period applies.