SNVU821 User guide

SNVU821 November 2023 TPS92642-Q1

4.2 Pulse Duty Cycle Limit (PLMT) Control

The TPS92642-Q1 features an internal analog circuit to impose a limit on the on time, t_ON(LMT), and off time, t_OFF(LMT), of the output current, I_LED. As illustrated in Figure 4-3, the device is controlled by external UDIM pulses with widths less than t_ON(LMT). Any external UDIM pulses that are longer than t_ON(LMT) are truncated to maintain a maximum fixed duty ratio of D_PLMT. The device also rejects any spurious pulses that can be present on the external UDIM input by blanking the UDIM signal during the PLMT off time. The off time is a function of the period, t_PLMT, set by the external capacitor, C_PLMT. The relationship between t_PLMT, t_ON(LMT), and D_PLMT is given in Equation 1.

Equation 1.

t_{O N (L M T)} = D_{P L M T} \times t_{P L M T}

Figure 4-3 Duty Cycle Limit Function Using Internal Pulse Generator

This mechanism is designed to help limit overexposure to infrared lights due to error conditions in DMS applications and the internal circuitry, as shown in Figure 4-4. The ratios of R_PLMT(PU) and R_PLMT(PD) are tightly controlled to maintain accurate D_PLMT.

Figure 4-4 PLMT Circuit to Control Max Duty Cycle D_PLMT

The desired pulse period, t_PLMT, is set by external capacitor, C_PLMT, as shown in Equation 2.

Equation 2.

t_{PLMT} = t_{O N (L M T)} + t_{OFF (L M T)} t_{P L M T} = 1.168 \times 10^{5} \times {C_{P L M T}}^{}

The maximum pulse on-duration, t_ON(LMT), and minimum off-duration, t_OFF(LMT), is given in Equation 3 and Equation 4.

Equation 3.

t_{O N (L M T)} = - (\ln (1 - \frac{V_{PLMT_ON}}{V_{CC}})) \times R_{P L M T (P U)} \times C_{P L M T} t_{ON (LMT)} = 0.6931 \times R_{PLMT (PU)} \times C_{PLMT}

Equation 4.

t_{OFF (LMT)} = {- (\ln (\frac{V_{PLMT_OFF}}{V_{PLMT_ON}})) \times R_{PLMT (PD)} \times C}_{PLMT} t_{O F F (L M T)} = {1.1 \times R_{P L M T (P D)} \times C}_{P L M T}

For LED current set point greater than 2.65 A, the maximum pulse-duration is impacted due to the switching noise in the system. The maximum pulse-duration as a function of LED current is given in Equation 5. Because the off-duration, t_OFF, does not change, the duty cycle ratio reduces with increase in LED current.

Equation 5.

t_{O N (L M T)} = 0.6931 \times R_{P L M T (P U)} \times C_{P L M T} - 1.76 \times 10^{- 2} \times (I_{L E D} - 2.5) \times t_{P L M T}

The TPS92642EVM-203 is by default setup with a PWM frequency limit of 39 Hz with a duty cycle limit of 13.6%. Testing the duty cycle control is performed by applying a PWM signal to the UDIM pin (TP3). Monitoring the PLMT circuit by using PLMT test point (TP9).

Figure 4-5 Test Point for Monitoring PLMT Circuit