TIDUF59 March   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 PFC Inductance Design
      2. 2.2.2 Configuration of CS pin in LMG3622
      3. 2.2.3 AHB Topology and the VCC Design
      4. 2.2.4 LMG2610 for AHB Topology
    3. 2.3 Highlighted Products
      1. 2.3.1 UCC28056
      2. 2.3.2 LMG3622
      3. 2.3.3 LMG2610
  9. 3Hardware, Test Requirements, and Test Results
    1. 3.1 Hardware
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Switching Waveform
        1. 3.3.1.1 Switching Waveform on the PFC Stage
        2. 3.3.1.2 Switching Waveform on the AHB Stage
      2. 3.3.2 Efficiency Test Result
      3. 3.3.3 Thermal Test Result
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Prints {Optional Section}
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

LMG2610

GUID-20221003-SS0I-HVJS-SCGB-KJJSLTGM5G2N-low.svg Figure 2-11 LMG2610 Function Block Diagram

The LMG2610 simplifies design, reduces component count, and reduces board space by integrating half-bridge GaN HEMT, gate drivers, bootstrap diode, and high-side gate-drive level shifter in a 9mm × 7mm QFN package.

The asymmetric GaN HEMT resistances are optimized for AHB operating conditions. Programmable turn-on slew rates provide EMI and ringing control.

The high-side gate-drive signal level shifter eliminates noise and burst-mode power dissipation problems found with external designs. The smart-switched GaN bootstrap FET has no diode forward-voltage drop, avoids overcharging the high-side supply, and has zero reverse-recovery charge.

The LMG2610 supports converter light-load efficiency requirements and burst-mode operation with low quiescent currents and fast start-up times. Protection features include FET turn-on interlock, undervoltage lockout (UVLO), cycle-by-cycle current limit, and overtemperature shut down.

  • 650V GaN HEMT half bridge
  • 170mΩ low-side and 248mΩ high-side GaN HEMT
  • Integrated gate drivers with low propagation delays and adjustable turn-on slew-rate control
  • Current-sense emulation with high-bandwidth and high accuracy
  • Low-side, high-side gate-drive interlock
  • High-side gate-drive signal level shifter
  • Smart-switched bootstrap diode function
  • Low-side, high-side cycle-by-cycle overcurrent protection
  • AUX idle quiescent current: 240μA
  • AUX standby quiescent current: 50μA
  • BST idle quiescent current: 60μA
  • Maximum supply and input logic pin voltage: 26V
  • 9mm × 7mm QFN package with dual thermal pads