SPRADB3 October   2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between AM263 and AM263P
  5. 2Feature Differences for System Consideration
    1. 2.1 New Features in AM263P
      1. 2.1.1 Resolver Peripheral
        1. 2.1.1.1 Migration From Software to Hardware Resolver
      2. 2.1.2 Trigonometric Math Unit
      3. 2.1.3 Remote L2 Cache
    2. 2.2 Memory Subsystem Differences
    3. 2.3 CONTROLSS Module Differences
      1. 2.3.1 ADC Feature Differences and Additions
      2. 2.3.2 ADC Safety Tile Additions
      3. 2.3.3 ADC_R Module Addition
    4. 2.4 QSPI/OSPI Module Differences
    5. 2.5 Hardware Security Module Differences
    6. 2.6 Hardware Differences
      1. 2.6.1 Sourcing VPP With ANALDO
  6. 3Software Changes Between AM263 and AM263P SDK
  7. 4List of Errata Fixes in AM263P

2.1.1.1 Migration From Software to Hardware Resolver

For AM263 devices, the five ADC modules (12-bit / 4 MSPS) with comparator subsystems can be leveraged to implement a software-based Resolver system.

With AM263P's integrated Resolver peripheral, two additional ADC modules (12-bit / 3 MSPS, no comparator subsystem) have been added to directly interface with it. This is in addition to the same five ADC modules with comparator subsystems that remain available. These added ADC modules can be used to interface to two parallel hardware resolver channels. The Resolver subsystem then hardware synchronizes precisely to the motor control PWM signal to enable the optimization of the motor control loop delay.