SPRADB3 October   2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between AM263 and AM263P
  5. 2Feature Differences for System Consideration
    1. 2.1 New Features in AM263P
      1. 2.1.1 Resolver Peripheral
        1. 2.1.1.1 Migration From Software to Hardware Resolver
      2. 2.1.2 Trigonometric Math Unit
      3. 2.1.3 Remote L2 Cache
    2. 2.2 Memory Subsystem Differences
    3. 2.3 CONTROLSS Module Differences
      1. 2.3.1 ADC Feature Differences and Additions
      2. 2.3.2 ADC Safety Tile Additions
      3. 2.3.3 ADC_R Module Addition
    4. 2.4 QSPI/OSPI Module Differences
    5. 2.5 Hardware Security Module Differences
    6. 2.6 Hardware Differences
      1. 2.6.1 Sourcing VPP With ANALDO
  6. 3Software Changes Between AM263 and AM263P SDK
  7. 4List of Errata Fixes in AM263P

Feature Differences Between AM263 and AM263P

Device Comparison provides a feature-level comparison between the super set AM2634 and AM263P4 devices.

Table 1-1 Device Comparison
Features Reference
Name
AM2634 AM263P4
Processors and Accelerators
Arm Cortex-R5F R5FSS 4 4

Trigonometric Math Unit

TMU No Yes
Hardware Security Module HSM Yes Yes
Crypto Accelerators Security Yes Yes
Program and Data Storage
On-Chip Shared Memory (RAM) OCSRAM Grade N: 1 MB
Grade O/P: 2 MB
Grade N: 2 MB
Grade O/P: 3 MB
R5F Tightly Coupled Memory (TCM) TCM Up to 256KB(9) Up to 512kB(10)
General-Purpose Memory Controller GPMC 4MB None
Peripherals
Modular Controller Area Network Interface MCAN 4 8
Full CAN-FD Support MCAN 4 8
General-Purpose I/O GPIO Up to 139 Up to 140
Serial Peripheral Interface SPI 5 8
Universal Asynchronous Receiver and Transmitter UART 6 6
Local Interconnect Network LIN 5 5
Inter-Integrated Circuit Interface I2C 4

4

Analog-to-Digital Converter ADC 3(1) or 5(2) 3(3) or 5(4)
Resolver (ADC12B3M) RDC None 0(7) or 2(8)
ADC None 0(7) or 2(8)
Comparator Modules CMPSS 12(1) or 20(2) 12(3) or 20(4)
Digital-to-Analog Converter DAC 1 1
Programmable Real-Time Unit Subsystem(5) PRU-ICSS 0 or 1 0 or 1
Industrial Communication Subsystem Support(6) PRU-ICSS Optional Optional
Gigabit Ethernet Interface CPSW 2 1(8) or 2(7)
Multi-Media Card/Secure Digital Interface MMCSD 1 1
Enhanced High-Resolution Pulse-Width Modulator Module EHRPWM 16(1) or 32(2) 16(3) or 32(4)
Enhanced Capture Module ECAP 5(1) or 10(2) 8(3) or 16(4)
Enhanced Quadrature Encoder Pulse Module EQEP 2(1) or 3(2) 2(3) or 3(4)
Sigma Delta Filter Module SDFM 1(1) or 2(2) 1(3) or 2(4)
Fast Serial Interface FSI 4x FSI_RX + 4x FSI_TX 4x FSI_RX + 4x FSI_TX
Quad / Octal SPI Flash Interface QSPI / OSPI QSPI OSPI(11)

Real Time Interrupt

RTI 4 8
Windowed Watchdog Timer WWDT 4 4
Standard Analog configuration for AM263 contains 3x ADC, 16x EHRPWM, 5x eCAP, 2x EQEP, 1x SDFM, 12x CMPSS
Enhanced Analog configuration for AM263 contains 5x ADC, 32x EHRPWM, 10x eCAP, 3x EQEP, 2x SDFM, 20x CMPSS
Standard Analog configuration for AM263P contains 3x ADC, 16x EHRPWM, 8x eCAP, 2x EQEP, 1x SDFM, 12x CMPSS
Enhanced Analog configuration for AM263P contains 5x ADC, 32x EHRPWM, 16x eCAP, 3x EQEP, 2x SDFM, 20x CMPSS
Programmable Real-Time Unit Subsystem is available when selecting an orderable part number that includes a feature code of D, E, F, K, L, M, or N. Refer to the Device Datasheet for a Nomenclature Description table for definition of all feature codes.
Industrial Communication Subsystem Support is available when selecting an orderable part number that includes a feature code of D, E, F, K, L, M, or N. Refer to the Device Datasheet for a Nomenclature Description table for definition of all feature codes.
Applies to devices in the ZCZ-C Package only and have a Special Features code of C. Refer to the Device Datasheet for a Nomenclature Description table for definition of all feature codes.
Applies to devices in the ZCZ-S Package only and have a Special Features code of F or S. Refer to the Device Datasheet for a Nomenclature Description table for definition of all feature codes.
Each R5FSS cluster supports 128-KB of Tightly-Coupled Memory (TCM). When configured as Single-Core or Lockstep operating mode, individual cores can utilize the entire 128-KB of TCM memory, while in Dual-Core mode, each core may only utilize its designated half (64-KB TCM).
Each R5FSS cluster supports 256-KB of Tightly-Coupled Memory (TCM). When configured as Single-Core or Lockstep operating mode, individual cores can utilize the entire 256-KB of TCM memory, while in Dual-Core mode, each core may only utilize its designated half (128-KB TCM).
The Octal SPI (OSPI) Flash Interface for AM263P devices can support Quad SPI (QSPI) Flash devices. The differences between the AM263 QSPI and AM263P OSPI interfaces are covered in Section 2.4.