SPRUJA1 October   2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Power Supply
      3. 2.2.3 Memory
      4. 2.2.4 JTAG/Emulator
      5. 2.2.5 Support Interfaces and Peripherals
      6. 2.2.6 Expansion Connectors/Headers
    3. 2.3  Interface Mapping
    4. 2.4  Power ON/OFF Procedure
      1. 2.4.1 Power ON Procedure
      2. 2.4.2 Power OFF Procedure
      3. 2.4.3 Power Test Points
    5. 2.5  Clocking
      1. 2.5.1 Peripheral Ref Clock
    6. 2.6  Reset
    7. 2.7  CSI Interface
    8. 2.8  Audio Codec Interface
    9. 2.9  HDMI Display Interface
    10. 2.10 JTAG Interface
    11. 2.11 Test Automation Header
    12. 2.12 UART Interface
    13. 2.13 USB Interface
      1. 2.13.1 USB 2.0 Type A Interface
      2. 2.13.2 USB 2.0 Type C Interface
    14. 2.14 Memory Interfaces
      1. 2.14.1 OSPI Interface
      2. 2.14.2 MMC Interfaces
        1. 2.14.2.1 MMC0 - eMMC Interface
        2. 2.14.2.2 MMC1 - Micro SD Interface
        3. 2.14.2.3 MMC2 - M.2 Key E Interface
      3. 2.14.3 Board ID EEPROM
    15. 2.15 Ethernet Interface
      1. 2.15.1 CPSW Ethernet PHY 1 Default Configuration
      2. 2.15.2 CPSW Ethernet PHY 2 Default Configuration
    16. 2.16 GPIO Port Expander
    17. 2.17 GPIO Mapping
    18. 2.18 OLDI Display Interface
    19. 2.19 Power
      1. 2.19.1 Power Requirements
      2. 2.19.2 Power Input
      3. 2.19.3 Power Supply
      4. 2.19.4 Power Sequencing
      5. 2.19.5 AM62x SIP SoC Power
      6. 2.19.6 Current Monitoring
    20. 2.20 EVM User Setup/Configuration
      1. 2.20.1 EVM DIP Switches
      2. 2.20.2 Boot Modes
      3. 2.20.3 User Test LEDs
    21. 2.21 Expansion Headers
      1. 2.21.1 PRU Connector
      2. 2.21.2 User Expansion Connector
      3. 2.21.3 MCU Connector
    22. 2.22 Interrupt
    23. 2.23 I2C Address Mapping
  8. 3Hardware Design Files
  9. 4Compliance Information
    1. 4.1 Compliance and Certifications
  10. 5Additional Information
    1. 5.1 Trademarks

Power Input

Both Type-C Connectors (VBUS and CC lines) are connected to a Dual PD controller Mfr Part# TPS65988. TheTPS65988 is a stand-alone USB Type-C and Power Delivery (PD) controller providing cable plug and orientation detection for two USB Type-C Connectors. Upon cable detection, the TPS65988 communicates on the CC wire using the USB PD protocol. When cable detection and USB PD negotiation are complete, the TPS65988 enables the appropriate power path. The two internal power paths of TPS65988 are configured as sink paths for the two Type-C ports and an external FET path is provided for Type-C CONN 2 to source 5 V when acting as DFP. The external FET path is controlled by GPIO17/PP_EXT2 of the PD controller.

TPS65988 PD controller can provide an output of 3 A (15 V max) through CC negotiation. The VBUS pins from both the Type C connectors are connected to the VBUS pins of the PD controller. The output of the PD is VMAIN, which is given to on board Buck-Boost and Buck regulators to generate fixed 5 V and 3.3 V supply for the SK EVM board.

GUID-20231006-SS0I-NPL2-VZ1L-D8QFWFN28MKR-low.png Figure 2-22 PD Controller

The following sections describe the power distribution network topology that supplies the SKEVM board, supporting components and reference voltages.

The AM62x SIP SK EVM board includes a power solution based on discrete power supply components. The initial stage of the power supply are VBUS voltage from either of the two USB Type C connectors J11 and J13. USB Type-C Dual PD controller of Mfr. Part# TPS65988DHRSHR is used for negotiation of the required power to the system.

Buck-Boost controller TPS630702RNMR and Buck converter LM61460-Q1 are used for the generation of 5 V and 3.3V respectively and the input to the regulators is the PD output. These 3.3 V and 5 V are the primary voltages for the AM62x SIP SK EVM Board power resources.

The 3.3 V supply generated from the Buck regulator LM61460-Q1 is the input supply to the various SoC regulators and LDOs. The 5 V supply generated from the Buck Boost regulator TPS630702RNMR is used for powering the on board peripherals.

Discrete regulators and LDOs used on board are:

  • TPS62824DMQR – To generate VDD_2V5 rail for Ethernet PHYs
  • TLV75510PDQNR – To generate VDD_1V0 for Ethernet PHYs
  • TLV75512PDQNR – To generate VDD_1V2 for HDMI Transmitter
  • TLV74018PDQNR – To generate 1.8 V Analog supply for SoC
  • TPS62A01DRLR – To generate 1.8V IO supply for SoC and for Peripherals namely OSPI, eMMC, Audio codec, M.2 Connector and Clock Buffer
  • TLV7103318QDSERQ1 – To generate VDDSHV5_MMC1(SD interface) supply for SoC
  • TPS62A01DRLR – To generate DDR Power for SoC
  • TPS62826DMQR – To generate Core supply for SoC

Dedicated regulators are also provided on the board for:

  • TPS62177 Regulator – Powering the always on circuits of Test Automation Section
  • TLV75518LDO – e-Fuse programming of SoC
  • TPS79601LDO – XDS110 On board emulator
  • TPS73533LDO – FT4232 UART to USB Bridge

Additionally, GPIO from the test automation header is also connected to the TPS630702RNMR Enable to control ON/OFF of the SK EVM via the test automation board. The test automation board only disables the VCC_5V0 output of TPS630702RNMR from which all other power supplies are derived. SoC has different IO groups. Each IO group is powered by specific power supplies as given in the next section.