Home Interface High-speed SerDes FPD-Link SerDes

SN65LVDS84AQ-Q1

ACTIVE

Automotive catalog FlatLink™ transmitter

SN65LVDS84AQ-Q1

ACTIVE

Product details

Function Serializer Color depth (bpp) 18 Input compatibility LVCMOS Output compatibility LVDS Features Capable to Drive up to 10 meters STP Cable Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 125
Function Serializer Color depth (bpp) 18 Input compatibility LVCMOS Output compatibility LVDS Features Capable to Drive up to 10 meters STP Cable Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • 21:3 Data Channel Compression at up to 196 Mbytes/s Throughput
  • Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI
  • 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Signaling (LVDS) Outputs
  • Operates From a Single 3.3-V Supply and 89 mW (Typ)
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
  • Consumes Less Than 0.54 mW When Disabled
  • Wide Phase-Lock Input Frequency Range: 31 MHz to 75 MHz
  • No External Components Required for PLL
  • Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • SSC Tracking Capability of 3% Center Spread at 50-kHz Modulation Frequency
  • Improved Replacement for SN75LVDS84 and NSC DS90CF363A 3-V Device
  • Qualified for Automotive Applications

  • 21:3 Data Channel Compression at up to 196 Mbytes/s Throughput
  • Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI
  • 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Signaling (LVDS) Outputs
  • Operates From a Single 3.3-V Supply and 89 mW (Typ)
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
  • Consumes Less Than 0.54 mW When Disabled
  • Wide Phase-Lock Input Frequency Range: 31 MHz to 75 MHz
  • No External Components Required for PLL
  • Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • SSC Tracking Capability of 3% Center Spread at 50-kHz Modulation Frequency
  • Improved Replacement for SN75LVDS84 and NSC DS90CF363A 3-V Device
  • Qualified for Automotive Applications

The SN65LVDS84AQ FlatLink™ transmitter contains three 7-bit parallel-load serial-out shift registers, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 or SN75LVDS86/86A.

When transmitting, data bits D0–D20 are each loaded into registers of the SN65LVDS84AQ upon the falling edge. The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN65LVDS84AQ requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers to a low level.

The SN65LVDS84AQ is characterized for operation over the full automotive temperature range of –40°C to 125°C.

The SN65LVDS84AQ FlatLink™ transmitter contains three 7-bit parallel-load serial-out shift registers, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 or SN75LVDS86/86A.

When transmitting, data bits D0–D20 are each loaded into registers of the SN65LVDS84AQ upon the falling edge. The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN65LVDS84AQ requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers to a low level.

The SN65LVDS84AQ is characterized for operation over the full automotive temperature range of –40°C to 125°C.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet FlatLink (TM) Transmitter datasheet (Rev. A) 24 Apr 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
TSSOP (DGG) 48 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos