The TLV320AIC3262 (also referred to as the AIC3262) is a flexible, highly-integrated, low-power, low-voltage stereo audio codec. The AIC3262 features digital microphone inputs and programmable outputs, PowerTune capabilities, enhanced fully-programmable miniDSP, predefined and parameterizable signal processing blocks, integrated PLL, and flexible audio interfaces. Extensive register-based control of power, input and output channel configuration, gains, effects, pin-multiplexing, and clocks are included, allowing the device to be precisely targeted to its application.
The TLV320AIC3262 features two fully-programmable miniDSP cores that support application-specific algorithms in the record and/or the playback path of the device. The miniDSP cores are fully software programmable. Targeted miniDSP algorithms, such as noise suppression or advanced DSP filtering, are loaded into the device after power-up.
Combined with the advanced PowerTune technology, the device can execute operations from 8-kHz mono voice playback to stereo 192-kHz DAC playback, making it ideal for portable battery-powered audio and telephony applications.
The record path of the TLV320AIC3262 covers operations from 8-kHz mono to 192-kHz stereo recording, and contains programmable input channel configurations which cover single-ended and differential set-ups, as well as floating or mixing input signals. It also provides a digitally-controlled stereo microphone preamplifier and integrated microphone bias. One application of the digital signal processing blocks is removable of audible noise that may be introduced by mechanical coupling, for example optical zooming in a digital camera. The record path can also be configured as a stereo digital microphone Pulse Density Modulation (PDM) interface typically used at 64 Fs or 128 Fs.
The playback path offers signal processing blocks for filtering and effects; headphone, line, receiver, and Class-D speaker outputs; flexible mixing of DAC; and analog input signals as well as programmable volume controls. The playback path contains two high-power DirectPath™ headphone output drivers which eliminate the need for AC coupling capacitors. A built-in charge pump generates the negative supply for the ground centered headphone drivers. These headphone output drivers can be configured in multiple ways, including stereo, and mono BTL. In addition, playback audio can be routed to integrated stereo Class-D speaker drivers or a differential receiver amplifier.
The integrated PowerTune technology allows the device to be tuned to just the right power-performance trade-off. Mobile applications frequently have multiple use cases requiring very low-power operation while being used in a mobile environment. When used in a docked environment power consumption typically is less of a concern while lowest possible noise is important. With PowerTune the TLV320AIC3262 can address both cases.
The required internal clock of the TLV320AIC3262 can be derived from multiple sources, including the MCLK1 pin, the MCLK2 pin, the BCLK1 pin, the BCLK2 pin, several general purpose I/O pins or the output of the internal PLL, where the input to the PLL again can be derived from similar pins. Although using the internal fractional PLL ensures the availability of a suitable clock signal, TI does not recommend for the lowest power settings. The PLL is highly programmable and can accept available input clocks in the range of 512 kHz to 50 MHz. To enable even lower clock frequencies, an integrated low-frequency clock multiplier can also be used as an input to the PLL.
The TLV320AIC3262 has a 12-bit SAR ADC converter that supports system voltage measurements. These system voltage measurements can be sourced from three dedicated analog inputs (IN1L/AUX1, IN1R/AUX2, or VBAT pins), or, alternatively, an on-chip temperature sensor that can be read by the SAR ADC.
The TLV320AIC3262 also features three full Digital Audio Serial Interfaces, each supporting I2S, DSP/TDM, RJF, LJF, and mono PCM formats. This enables three simultaneous digital playback and record paths to three independent digital audio buses or chips. Additionally, the general purpose interrupt pins can be used to connect to a fourth digital audio bus, allowing the end system to easily switch in this fourth audio bus to one of the three Digital Audio Serial Interfaces.
The device is available in the 4.81 mm × 4.81 mm × 0.625 mm 81-Ball WCSP (YZF) package.
|Part number||Order||ADC channels||ADC SNR (Typ) (dB)||DAC channels||DAC SNR (Typ) (dB)||Analog inputs||Analog outputs||Sampling rate (Max) (kHz)||Digital audio interface||Package size: mm2:W x L (PKG)||Approx. price (US$)|
|81DSBGA: 25 mm2: 5 x 5 (DSBGA | 81)||4.95 | 1ku|
|81DSBGA: 25 mm2: 5 x 5 (DSBGA | 81)||5.25 | 1ku|